RU2004925C1 - Device for computation of multidimensional polynomials - Google Patents

Description

foreign connections within the blocks to achieve the specified set of features, which are not found in the known literature. Consequently, the proposal is novel.

In FIG. 1 shows a general structural diagram of a device; in FIG. 2 is a functional diagram of one of the blocks for computing one-dimensional polynomials; in Fig.3 - dependence of Q on Y.

The device contains a pulse generator 1, an AND element 2, an average 3 and N polynomial calculation blocks, each of which contains a group of 4 OR elements, a counter for the number of members of the polynomial 5, a node 6 for the memory of degree exponents, a node 7 for the memory of the coefficients of the polynomial, a node 8 exponentiation, a multiplier 9, an accumulating adder 10, a first register 11, a second register 12, a third register 13, a key 14, an argument memory node 15, a comparison block 16 with zero, a comparison block 17 with the number Kn + 1, the first element 18 delays, second delay element 19, third elem Ent 20 delays, the fourth element 21 delays.

The device has a generalized multidimensional polynomial of the form

Y- | arMx), (1)

r 0

where x {XL X2, .., XN} is the set of independent parameters (arguments with the number N;

R + 1 is the number of members of the generalized polynomial;

- Ј1 ° f

fr (x) X Xj is a function defining the form

rth member of the generalized polynomial;

ctrj is the measure of the degree to which the jth argument is included in the rth member of the generalized polynomial;

is represented as a system of N one-dimensional polynomials

n 1. N,

(2)

The value of the generalized multidimensional polynomial is determined from (2) in the average calculation unit that implements the calculation by the formula

1

N

, Y

(3)

The equations of system (2) are determined from polynomial (1) by the following mathematical transformation. To convert (1) into a given equation of system (2) corresponding to the element xi, it is necessary to use the initial function (1) instead of the arguments X, in addition to the considered xi, substitute their values corresponding to the point of mathematical transformation

. xn2hp, xni + iX N.

The error Q of representation (1) in the form of (2) and (3) for given values of the arguments X is defined as

25

Q,

(4)

where Y is the value of the generalized multidimensional polynomial defined by the formulas

(2), (3);

Y is the nibble of a generalized multidimensional polynomial defined by formula (1); The value of Q depends on the current values of X and Y. In FIG. 3 shows the dependence

Q from Y. The value of Yn (see Fig. 3) corresponds to the point of the mathematical transformation Xn used to obtain the system of equations (2).

In control systems during organization

the control process according to the generalized indicator, the measured value of the arguments X determines the valence of the indicator Y to compare it with a given norm (required value) Yip. Based on the results of the comparison, a conclusion is drawn on the validity of the product described by polynomial (1), in accordance with the decisive rule of the form

Y YTp or Y YTp.

where bin is the weight coefficient;

Qn is the exponent in the lth term of the nth one-dimensional polynomial;

Kn + 1 is the number of members of the nth one-dimensional polynomial.

Therefore, when presenting polynomial (1) in the form of system (2), the proposed device can be used to calculate polynomial values with the number of arguments N 1.

Therefore, in this case, it is not necessary to ensure high accuracy in calculating the values of polynomial (1) over the entire range of possible values of Y. It is required to calculate with high accuracy only the boundary values of Ut. Therefore, if the point Yn (Fig. 3) corresponds to the boundary value YTp, then system (2) will provide high reliability of dividing products into classes of suitable and unfit in accordance with the specified decision rule.

Thus, the memory node 7 is a memory in Kp + 1 register, the node 15 of the argument memory is a memory in one register, the node 6 of the exponent memory is a memory in Kp + 1 register. The resolution of the counter 5 is determined by the value (Kn + 1).

The device operates as follows. In the initial state, the accumulating adder 10 is zeroed, and one is entered in the counter 5. The coefficients of one-dimensional polynomials (2) are entered in node 7, which are calculated for a given polynomial (1) by the described mathematical transformation from the values of Xn corresponding to a given value of YTp, to the memory node 15, the value of the argument xi. In each 1st register of the memory node 6, the exponents (, Кп) are entered. At the control input of the key 14 is zero.

At the Start signal, the pulse generator 1 is started, the first pulse of which is supplied through the key 14 to the input of the exponent 6 of the exponent memory and to the input of the argument memory node 15, thereby starting the step of calculating the first term of the one-dimensional polynomial. In this case, the degree index value for the first member of the one-dimensional polynomial is extracted from the degree index memory unit 6 and is supplied to the first input of the exponentiation unit 8, as well as to the input of the comparison circuit 16, where a comparison with zero is performed. If the value of the received number is not equal to zero, then the output of the comparison circuit 16 shows a zero that does not affect the passage of the argument xi from the block 15 of the argument memory through the group of 4 elements OR to the second input of the block 8 raising to the power for any, even the null value of the argument xi. The result of exponentiation is fed to the input of the second register 12, and at the moment of arrival of the delayed pulse from the output of the second delay element 19, the result is written to this register. In the first register 11, the value of the first coefficient of the one-dimensional polynomial bin (,) is written, which is extracted from the polynomial coefficient memory node 7 at the time of setting the counter 5 of the number of members of the polynomial to its initial state (fill the units).

At the moment of arrival of the pulse from the first output of the fourth delay element 21, the contents of registers 11, 12 are multiplied on the multiplier 9 and the result is recorded in register 13, from the output of which this result is fed to the input of the accumulating adder 10 and entered into it

with the arrival of a pulse from the second output of the delay element 21 supplied to its control input.

From the output of the key 14, the pulse through the first delay element 18 is fed to the input of the counter 5 of the number of members of the polynomial, adding one to its contents. After that, the calculation of the second term of the one-dimensional polynomial begins. Values

all members of the one-dimensional polynomials are sequentially accumulated in the adder 10, which sums its contents with the newly arrived member. As soon as the contents of the counter 5 exceeds the value of Kn + 1, the output of the circuit 17 is a unit that goes to the control input of the key 14, thereby prohibiting the passage of clock pulses from the generator 1 and, therefore, stopping

the calculation process in this pth block for computing one-dimensional polynomials. In addition, the unit from the output of the comparison circuit 17 goes to one of the inputs of the group of 2 elements I. As soon as all N blocks of calculation of one-dimensional polynomials complete the calculation, all the inputs of the group of 2 elements And will be one, and the unit signal from the output of the group of 2 elements And is provided stopping the pulse generator 1, setting to the initial state of the counter 5 the number of members of the polynomial, zeroing through the third element 20 of the delay of the accumulating adder in each fifth block of calculation of one-dimensional polynomials and

the inclusion in the operation of the average calculation unit 3, in which the average value from the values of one-dimensional polynomials is calculated by the formula (3). This completes the operation of the device.

The results of theoretical calculations and

mathematical modeling confirmed the operability of the proposed device and showed that a device has been created for calculating the values of multidimensional generalized polynomials (1) by formulas (2) and (3) when working with real numbers. The device is intended for calculating the values of multidimensional polynomials (with the number of arguments N 1).

The results of mathematical modeling and comparative analysis showed that the proposed device allows us to solve the problem of calculating values for a wider class of multidimensional polynomials

(with the number of arguments N 1), with higher speed, with lower hardware costs than the known device. Moreover, the difference in hardware costs is higher, the greater the number N.

polynomial arguments. The computation time using the proposed device is practically independent of the number of arguments of the polynomial and approximately equal to the computational time of the one-dimensional polynomial. At the same time, as the simulation results showed, the minimum value of the error Q, determined according to (4) and in accordance with the invention, Formula for calculating multidimensional polynomials, containing a pulse generator, an average calculation unit, an And element, and N polynomial calculation blocks (N is the polynomial dimension) , each of which contains a counter of the number of members of the polynomial, a node for the memory of exponents, a node for the memory of the coefficients of the polynomial, a node for raising to a power, a multiplier that accumulates an adder, three registers, a key, uze in the argument memory, a comparison block with zero, a comparison block with the number Кп + 1 (Кп is the number of members of the nth one-dimensional polynomial), four delay elements and a group of OR elements, with the device start input connected to the pulse generator input of the same name, the stop input which is connected to the output of the element And, the 1st input (II, N) of which is connected to the output of the comparison unit with the number Кп + 1 of the 1st polynomial calculation unit, the output of the pulse generator is connected to the information input of the key of each polynomial calculation unit, the control input whose connected to the output of the comparison node with the number Kn + 1, the input of which is connected to the input of the polynomial coefficient memory node and the output of the counter of the number of polynomial members, the counting and installation inputs of which are connected respectively to the output of the first delay element, with the output of the And element and the input of the second delay element the output of which is connected to the installation input of the accumulating adder, the sync input of which is connected to

The point used to convert (1) to (2) practically corresponds to the analogue, i.e. so small that in case of coincidence, the control provides with a confidence of almost 1.

(56) Copyright certificate of the USSR N 962973. cl. G 06 F 15/31, 1981.

the first output of the third delay element, the output of the polynomial coefficient memory node is connected to the information input of the first register, the output of which

connected to the first input of the multiplier, the second input of which is connected to the output of the second register, the recording input of which is connected to the output of the fourth delay element, the output of the multiplier is connected to

the information input of the third register, the recording input and output of which are connected respectively to the second output of the third delay element and the information input of the accumulating adder, the output of the counter of the number of members of the polynomial is connected to the first address input of the exponent memory node, the output of which is connected to the exponent of the exponentiation node and the input of the zero-comparison block, the output of which is connected to the first input of the elements of the OR group, the output and second input of which are connected respectively to the input of the argument of the exponentization node and by the output of the argument memory node, the output of the accumulating adder of the 1st polynomial computing unit is connected to the i-th input of the average computing unit, characterized in

that, in order to simplify, the key output is connected to the inputs of the first, third and fourth delay elements, the input of the first register record, the second address input of the exponent memory node and the input of the argument memory node, the output of the exponentization node is connected to the information input of the second register .