SU1206795A2 - Device for simulating failures in complex systems - Google Patents

Description

The invention relates to computing and can be used to generate random events corresponding to the collection of complex systems, with a statistical study of the mathematical models of these systems on a computer in order to determine their characteristics, for example, performance reliability indicators,

The purpose of the invention is to expand the functionality of the device by simulating the time of action of failures on the elements of a complex system,

The device is focused on complex systems, which are characterized by the following: a system containing a series of elements with the same reliability characteristics; the occurrence of disruption numbers 0, 1, 2,.,., N during the system operation time obeys a binomial law approximated by the Punson distribution law; the occurrence of each failure of the elements of the system is subject to any given distribution law; The duration of the failure of the system element to work is subject to any given distribution law, including the experimentally obtained.

The drawing shows a block diagram of the device.

The device contains a sensor 1 primary stream of random pulses (DPSS), element I 2, one-shot 3, counter 4 pulses, arithmetic unit 5, first 6 and second 7 registers of memory, generator 8 of uniformly distributed random numbers, first generator 9 of random numbers with given distribution laws, delay element 10, first to third groups of elements 11-13, second random number generator 14 with given distribution law, third register 15 of memory.

The device works in the following way.

The polling signal corresponding to the next statistical implementation resets the pulse counter 4 at the output of which the number of counted pulses appears, corresponding to the number of failures of the elements of the simulated system in the previous implementation, and starts a single vibrator 3, which opens

0 5 Q

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five

five

And 2 for a given time & t, the corresponding time of the system. During this time, the pulses from the sensor 1 of the primary (punch) stream of random pulses are fed to the input of the counter of 4 pulses, to the input of the generator 8 uniformly distributed random numbers, to the inputs of the generators 9 and 14 random numbers with a given distribution law, and through element 10 delays on control inputs of elements AND groups. The delay element 10 is necessary so that the generators 8, 9 and 1.4, operating in standby mode, have time to generate and install on the registers 6, 7 and 15 of the memory the corresponding random numbers before the arrival of the pulse to the control inputs of the elements I. With the arrival of each pulse from element 2 after delaying the control inputs of elements 11-13 of all three groups from memory register 6 random number i, corresponding to the time distribution of failures in the system elements within the system operation time, parallel code through the element AND 11 is supplied to a first input of the arithmetic unit 5; from memory register 7 - another random number |., corresponding to the number of the element in which the failure occurred, a parallel code through element 12 goes to the second input of the arithmetic unit 5, and from memory register 15 - the third random number V ;, the corresponding the duration of the impact on the work of the j-th element of a complex system, parallel code through the elements And 13 is fed to the third input of the arithmetic unit 5,

In the arithmetic unit 5

the first random number is multiplied by At and fed to the first output of the arithmetic unit 5, which is the first output of the device; the second random number j is multiplied by the number of elements of the system N, rounded to the nearest integer and fed to the second output of the arithmetic device 5, which is the second output of the device; and the third random number V, is multiplied by L i and goes to the third output of the arithmetic unit, which is the third output of the device.

The interval AL can be chosen to be equal, for example, to the minimum time of exposure to an element of the system on an appropriate time scale, and multiplied by a random number V; determines the duration of the impact on the element of a complex system,

Thus, when simulating failures in the operation of complex digital computers, the minimum impact time can be chosen equal to one cycle of operation of the digital computer in an appropriate time scale, and the product in this case determines the number of cycles of operation of the simulated digital computer,

which item with the number. subject to: under influence.

In the event that the time interval defined by the product of & l is equal to or greater than the time interval remaining until the end of the 4t cycle, we can assume that the j-th system element failed, similar to the element failure modeled by the known device.

Upon completion of the implementation, a number corresponding to the number of failures in the system during the operation of the system will be accumulated on the pulse counter. With the arrival of the next polling pulse, the operation cycle of the device is repeated for a new static implementation.

VNIIPI Order 8715/51 Circulation 673 Subscriber's Fundamental PPP Patent, Uzhgorod, Proektna St., 4

Claims (1)

DEVICE FOR MODELING FAILURES IN COMPLEX SYSTEMS by ed. St. No. 902020, characterized in that, in order to expand the functionality by modeling the time of the action of failures on the elements of a complex system, it additionally contains a third group of AND elements, a third memory register and a second random number generator with a given distribution law, the start input of which is connected to the output element And, the outputs are connected respectively to the bit inputs of the third memory register, the bit outputs of which are connected respectively with the first inputs of the elements And the third group, the second inputs are which are combined and connected to the output of the delay element, and the outputs of the AND elements of the third group are connected respectively to the inputs. the third group of arithmetic unit, the third output of which is the third output of the device. SU., 1206795