SU1509927A1 - Device for modeling queuing systems - Google Patents

Abstract

The invention relates to computer technology, in particular to specialized electronic modeling tools for studying queuing systems. The purpose of the invention is to improve the accuracy of modeling. A device containing a block of random delays, a generator of a random stream of pulses, a prohibition element, the first and second elements AND, a reversible counter of the number of occupied channels, a decoder, a element of random delay, the third element AND, a trigger, the element NOT are entered. 2 Il.

Description

The invention relates to computing and can be used in the study of queuing systems (QS).

The purpose of the invention is to improve the accuracy of modeling

Figure 1 shows the device; Fig 2 shows a block diagram of random time delays about

The device contains a generator 1 slz ay stream of pulses, an element 2 of the ban, a reversible counter 3, the number of occupied channels, a counter 4 of the total number of submissions, a counter 5 of lost submissions, the first 6, second 7 and third 8 elements And, trigger 9, element NOT 10, a decoder 11, a random delay element 12 and a block of 13 random delays.

Block 13 contains (K-1) control nodes 14 into which the elements are input. SH-NOT 15, OR 16 and NOT 17. In addition, the block includes element K of service channels 18, which contain an AND 19 element, a trigger 20, a random delay element 21, an OR element 22, a prohibition element 23. The block also contains the element OR 24, output 25.

The device operates in two modes: in the first mode, simultaneous preparation of all channels of the system is simulated after entering the application in a free system according to a law different from the service law of the order. In the second mode of operation, the device simulates the processing (that is the simultaneous start of service). the preparation time and then the subsequent applications as they arrive until the system is released, With the first application entering the system, the modes of operation of the device are repeated.

An example of the considered type of QS is multiprocessor computing systems, in which, after entering the application in a free system, time is needed to bring it to the working state.

SP

about

D Yu

3150

The device works as follows

The pulses from the generator I are received through the open element 2 of the prohibition on the summing input of the reversible counter 3, the number of occupied channels. The arrival of a pulse to the summing input of the reversible counter of the occupied channels increases its code by one, which means that one channel

Simulation of the operation mode by simultaneous preparation of all channels is performed as follows. Suppose that the system is completely free from the order and the trigger 9 is in a single state. Then the impulse that appeared at the output of the generator 1 passes through the open interdiction elements 2 and the element 7, sets the trigger 9 to the zero state, excluding the passage of subsequent pulses through element 8 to the input of block 13, and enters element 12, which models the random preparation time of all channels. After this time, the signal simulating the completion of channel preparation, from the output of element 12, sets to one state trigger 9 and enters unit 13 (input g), simulating the start of service of all applications received during the preparation of channels, and the transition of the system to the second operation mode. The number of applications received during preparation is determined by a single signal at one of the the control inputs of the unit 13 connected to the decoder 11 “The device can operate in the first mode only if the system is free, which is determined by the signal at the zero output of the decoder 11 o If at least one channel of the system is occupied, then signal to zero m output of the decoder 11 closes the element And 7, which prohibits the passage of a pulse to the input of the element 12, imitating the preparation of all service channels

In the second mode, the pulses from the generator 1 pass through the open prohibition element 2 and the AND 8 element to the block 13, imitating the simple processing of the application, and, appearing at its output after a time equal to the random processing activity, arrive at the subtraction input counter 3 numbers

unused channels, which means the release of one channel in the system.

At the time when all channels are busy, at the last output of decoder 11 a signal appears that closes the prohibition element 2 and the opening element AND 6. At the same time, the pulses from generator 1 pass through the element 6, imitating the flow of rejected requests in service, the number of which is counted by the counter 5. In the counter 4, during the operation of the device, the total number of applications received into the system accumulates

Block 13 of random time delays simulates group service of a bill received in a free system during the warm-up time, and then servicing a random flow of the bill as they arrive and the channels release

Block 13 works as follows

In the initial state, the triggers 20 of all service channels are in a single state, ensuring the presence of zero potentials at the element outputs. OR — NOT 15 with numbers greater than or equal to the channel number that the trigger belongs to. Consequently, the AND 19 element of the first channel is open, And elements And 19 other channels are closed for signals from a single block input

At the beginning of each cycle, a simultaneous start of service for a group of applications received in a free block is simulated for this purpose, the signal to the group input G and a signal to one of the control inputs Y defining the number of applications in the group

The signal from the group input G of the block through the OR element 22 of the first channel I8 passes to the zero input of the trigger 20 and to the input of the delay element 21 of the first channel, thereby simulating the start of service of the first application. The same signal passes through the open prohibition elements 23 and elements 22 the inputs of the elements 22 and the zero inputs of the flip-flops of the 20 subsequent channels, until on its way the element 23 of the ban meets, blocked by a signal from the 5-direction (its input is Y; (where i is the number of quotations

group). This provides a simulation of the start of service of a group of applications received in a free block, after which the unit provides an imitation of the random flow of service of the application as they arrive at its single input. If one of the channels 18 is free, suppose with the number j, then its trigger 20 is in the single state, and the signal from its output (through the sequence of the OR 16 and OR-NOT elements of the control groups) excludes the possibility of a pulse simulating the arrival of the application inputs of channels with large numbers The impulse received on a single input (assuming channels with less than 1 numbers are occupied) through the open element AND 19 of the j-ro channel and the element OR 22. passes to the zero input of the trigger 20. and to the input element 21-0. As long as the pulse does not appear at the output of element I. 21, the trigger 20 of the corresponding channel is in the zero state, providing a closed state (through the elements. NO. 15) item and 19o

The next impulse from a single input is similarly fed to the input of a free channel with a lower number.

Pulse element 21,. The output at a time equal to the random service duration sets the corresponding trigger 20 to one state and simultaneously through the OR 24 element enters the output of the block.

The statistical characteristics of the operation of the QS are calculated by known methods.

Claims (1)

Invention Formula A device for simulating queuing systems, comprising a random pulse generator, a prohibition element, a random delay element, first and second And elements, a reversible counter for the number of occupied channels, a de-generator and a random delay unit, a random delay element consisting of K service channels, (K-1) control nodes and an OR element, each service channel contains an AND element, and a trigger, whose zero input connects five 0 five 0 five 0 five 0 five with the output of the random delay element of its service channel and the corresponding input of the OR element of the random delay unit, the forward output of the i-ro trigger of the service channel (i 2, k) is connected to the first input (il) -ro of the control unit, the forward output of the first trigger the service channel is connected to the second input of the first control node; the first output of the j node of the control node (j 1, K - 2) is connected to the second input of the (j + 1) th control shaft; the direct output of the trigger of the first service channel is connected to the first entry of the element AND its service channel, and the second output of the 1st control node (, K-1) is connected to the first input of the AND service channel element (l + l) -ro, the output of the random pulse flow generator is connected to the information input of the prohibition element and the first input of the first AND device element, output which is the output of the lost orders of the device, and the second input of the first element AND and the control input of the prohibition element are connected to the last output of the decoder, the first output of which is connected to the first input of the second element AND of the device, the output of which is under:: The device’s random delay, the output of the inhibition element is connected to the second input of the second element AND device and the reversible counter of the number of occupied channels, the subtractive input of which is connected to the output of the OR element of the random delay unit, the discharge outputs of the reversible counter of the occupied channels are connected respectively to the inputs of the decipher, characterized in that, in order to increase the accuracy of the simulation, it additionally contains a trigger, an element NOT and a third AND element, and each service channel of the random delay unit additionally contains the OR element, the i-th service channel additionally contains a prohibition element, and the output of the prohibition element of the i-ro service channel is connected to the first input of the SS element of its service channel and the control input of the prohibition element (i + l) -ro of the service channel, each service channel, the output of the element AND is connected to the second input of the element OR, its own channel service, the output of which is connected to the input of the random delay element and the single input of the trigger of your service channel, the first input of the OR element of the first service channel and the control input of the prohibition element of the second service channel are combined and connected to the output of the random delay element of the device and the zero input of the device trigger whose single input is connected to the output of the second element AND device, the second inputs of the element AND all service channels are combined and connected to the output of the third element AND device, and the information inputs of the prohibition elements of the service channels are connected respectively to the second and last last outputs of the device decoder, the first output of which is connected to the first input of the third AND element of the device NOT the device, the second and third inputs of which are connected respectively with direct output of the device trigger and output of the device inhibit element Fy