RO102023A2 - Metoda si circuit electronic pentru controlul memoriilor semiconductoare, dinamice - Google Patents

Metoda si circuit electronic pentru controlul memoriilor semiconductoare, dinamice

Info

Publication number
RO102023A2
RO102023A2 RO1988133748A RO13374888A RO102023A2 RO 102023 A2 RO102023 A2 RO 102023A2 RO 1988133748 A RO1988133748 A RO 1988133748A RO 13374888 A RO13374888 A RO 13374888A RO 102023 A2 RO102023 A2 RO 102023A2
Authority
RO
Romania
Prior art keywords
inquiries
memory
access
electronic circuit
arbitration
Prior art date
Application number
RO1988133748A
Other languages
English (en)
Other versions
RO102023B1 (ro
Inventor
Ro Hornea Dan Petru
Original Assignee
Institutul De Cercetare Stiintifica Si Inginerie Tehnologica Pentru Electrotehnica, Bucuresti, Ro
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Institutul De Cercetare Stiintifica Si Inginerie Tehnologica Pentru Electrotehnica, Bucuresti, Ro filed Critical Institutul De Cercetare Stiintifica Si Inginerie Tehnologica Pentru Electrotehnica, Bucuresti, Ro
Priority to RO1988133748A priority Critical patent/RO102023A2/ro
Publication of RO102023B1 publication Critical patent/RO102023B1/ro
Publication of RO102023A2 publication Critical patent/RO102023A2/ro

Links

Landscapes

  • Dram (AREA)
RO1988133748A 1988-05-30 1988-05-30 Metoda si circuit electronic pentru controlul memoriilor semiconductoare, dinamice RO102023A2 (ro)

Priority Applications (1)

Application Number Priority Date Filing Date Title
RO1988133748A RO102023A2 (ro) 1988-05-30 1988-05-30 Metoda si circuit electronic pentru controlul memoriilor semiconductoare, dinamice

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
RO1988133748A RO102023A2 (ro) 1988-05-30 1988-05-30 Metoda si circuit electronic pentru controlul memoriilor semiconductoare, dinamice

Publications (2)

Publication Number Publication Date
RO102023B1 RO102023B1 (ro) 1991-08-30
RO102023A2 true RO102023A2 (ro) 1991-11-25

Family

ID=20121795

Family Applications (1)

Application Number Title Priority Date Filing Date
RO1988133748A RO102023A2 (ro) 1988-05-30 1988-05-30 Metoda si circuit electronic pentru controlul memoriilor semiconductoare, dinamice

Country Status (1)

Country Link
RO (1) RO102023A2 (ro)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
MD3984G2 (ro) * 2008-07-14 2010-06-30 Генадие БОДЯН Memorie operativă cu autotestare compactă

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
MD3984G2 (ro) * 2008-07-14 2010-06-30 Генадие БОДЯН Memorie operativă cu autotestare compactă

Also Published As

Publication number Publication date
RO102023B1 (ro) 1991-08-30

Similar Documents

Publication Publication Date Title
DE69133572D1 (de) Halbleiterbauelement mit dynamischem Arbeitsspeicher (DRAM)
KR860002871A (ko) 2층 구조의 다이나믹 랜덤 액세스 메모리(dram) 셀
JPS6446293A (en) Scanning tester for digital system with dynamic random access memory
CA2011518A1 (en) Distributed cache dram chip and control method
DE69325119D1 (de) Taktsynchronisierter Halbleiterspeicheranordnung und Zugriffsverfahren
KR960026780A (ko) 단일/이중 인-라인 메모리 모듈에 패키징되는 동기식 메모리 및 제조 방법
BR9103873A (pt) Aparelho de processamento de dados para determinacao dinamica da sincronizacao em sistema dinamico de memoria
DE69517079D1 (de) Verfahren und Vorrichtung zur Prüfung eines Speichers mit programmierbarer Selbstauffrischung
DE3751399D1 (de) Parallelrechner mit verteilten, gemeinsam genutzten Speichern und verteilten, aufgabenaktivierenden Schaltungen.
JPS57117168A (en) Memory circuit
EP0473388A3 (en) A dynamic type semiconductor memory device with a refresh function and method for refreshing the same
KR900012276A (ko) 다이내믹형 반도체기억장치
EP0176203A3 (en) Self refresh control circuit for dynamic semiconductor memory device
KR910005174A (ko) 이중영역 기억장치 제어기 및 그 제어방법
KR970067367A (ko) 단일칩 동기식 다이너믹 랜덤 억세스 메모리(dram) 시스템
RO102023A2 (ro) Metoda si circuit electronic pentru controlul memoriilor semiconductoare, dinamice
KR900012274A (ko) 다이나믹 랜덤억세스 메모리장치
DE69119203D1 (de) Dynamische Direktzugriffspeicheranordnung mit verbesserter Auffrischungsschaltung
US5179713A (en) Apparatus for allowing external control of local bus read using zero wait stats input of combined I/O and DRAM controller
KR0176634B1 (ko) 16비트 데이타 버스를 가진 디램 데이타 억세스 제어회로
ES2091606T3 (es) Sistema de ordenador.
EP0361143A3 (en) Circuitry for the on-chip interleaved access to dynamic ram modules
DE3068306D1 (en) Semiconductor refresh circuit in dynamic random access memory
KR0183813B1 (ko) 디알에이엠 리프레쉬 제어기
JPH03116459U (ro)