PL116724B1 - Method and system for executing data processing instructions in a computer - Google Patents

Method and system for executing data processing instructions in a computer Download PDF

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Publication number
PL116724B1
PL116724B1 PL1976189508A PL18950876A PL116724B1 PL 116724 B1 PL116724 B1 PL 116724B1 PL 1976189508 A PL1976189508 A PL 1976189508A PL 18950876 A PL18950876 A PL 18950876A PL 116724 B1 PL116724 B1 PL 116724B1
Authority
PL
Poland
Prior art keywords
data
instruction
function
instructions
type
Prior art date
Application number
PL1976189508A
Other languages
English (en)
Polish (pl)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of PL116724B1 publication Critical patent/PL116724B1/pl

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Bus Control (AREA)
  • Multi Processors (AREA)
  • Executing Machine-Instructions (AREA)
PL1976189508A 1975-05-14 1976-05-12 Method and system for executing data processing instructions in a computer PL116724B1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE7505552A SE7505552L (sv) 1975-05-14 1975-05-14 Sett och anordning att efter varandra avverka databehandlingsinstruktioner i funktionsenheter hos en datamaskin

Publications (1)

Publication Number Publication Date
PL116724B1 true PL116724B1 (en) 1981-06-30

Family

ID=20324577

Family Applications (1)

Application Number Title Priority Date Filing Date
PL1976189508A PL116724B1 (en) 1975-05-14 1976-05-12 Method and system for executing data processing instructions in a computer

Country Status (27)

Country Link
US (1) US4053947A ( )
JP (1) JPS5942893B2 ( )
AR (1) AR212022A1 ( )
AU (1) AU510011B2 ( )
BE (1) BE841694A ( )
BR (1) BR7603014A ( )
CA (1) CA1068006A ( )
CH (1) CH613538A5 ( )
CS (1) CS219319B2 ( )
DD (1) DD125023A5 ( )
DE (1) DE2619661A1 ( )
DK (1) DK214276A ( )
EG (1) EG13391A ( )
ES (1) ES447844A1 ( )
FI (1) FI761315A ( )
FR (1) FR2311356A1 ( )
GB (1) GB1529638A ( )
HU (1) HU182481B ( )
IN (1) IN156422B ( )
IT (1) IT1063311B ( )
MY (1) MY8000079A ( )
NL (1) NL7604966A ( )
NO (1) NO761661L ( )
PL (1) PL116724B1 ( )
SE (1) SE7505552L ( )
SU (1) SU755225A3 ( )
YU (1) YU40281B ( )

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4306286A (en) * 1979-06-29 1981-12-15 International Business Machines Corporation Logic simulation machine
JPS57155666A (en) * 1981-03-20 1982-09-25 Fujitsu Ltd Instruction controlling system of vector processor
SE430199B (sv) * 1982-02-12 1983-10-24 Ellemtel Utvecklings Ab Sett och anordning for att ge identitet at och utpeka en av ett antal funktionsenheter
US4511961A (en) * 1982-04-16 1985-04-16 Ncr Corporation Apparatus for measuring program execution
US4656580A (en) * 1982-06-11 1987-04-07 International Business Machines Corporation Logic simulation machine
JPH0217808Y2 ( ) * 1984-10-29 1990-05-18
JPS6250085U ( ) * 1985-09-14 1987-03-27
US6904480B1 (en) * 1997-12-17 2005-06-07 Intel Corporation Testing a bus using bus specific instructions
US8914615B2 (en) 2011-12-02 2014-12-16 Arm Limited Mapping same logical register specifier for different instruction sets with divergent association to architectural register file using common address format

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3215987A (en) * 1962-06-04 1965-11-02 Sylvania Electric Prod Electronic data processing
US3657705A (en) * 1969-11-12 1972-04-18 Honeywell Inc Instruction translation control with extended address prefix decoding
JPS514381B1 ( ) * 1969-11-24 1976-02-10
US3766532A (en) * 1972-04-28 1973-10-16 Nanodata Corp Data processing system having two levels of program control

Also Published As

Publication number Publication date
ES447844A1 (es) 1977-07-16
JPS5942893B2 (ja) 1984-10-18
FR2311356A1 (fr) 1976-12-10
FI761315A ( ) 1976-11-15
HU182481B (en) 1984-01-30
JPS51140451A (en) 1976-12-03
CA1068006A (en) 1979-12-11
AR212022A1 (es) 1978-04-28
DK214276A (da) 1976-11-15
NO761661L ( ) 1976-11-16
BR7603014A (pt) 1977-01-11
CH613538A5 ( ) 1979-09-28
YU116976A (en) 1982-06-30
BE841694A (fr) 1976-09-01
DE2619661A1 (de) 1976-12-02
AU510011B2 (en) 1980-06-05
AU1387576A (en) 1977-11-17
GB1529638A (en) 1978-10-25
SE7505552L (sv) 1976-11-15
YU40281B (en) 1985-12-31
IT1063311B (it) 1985-02-11
US4053947A (en) 1977-10-11
NL7604966A (nl) 1976-11-16
MY8000079A (en) 1980-12-31
SU755225A3 (en) 1980-08-07
FR2311356B1 ( ) 1980-07-11
CS219319B2 (en) 1983-03-25
EG13391A (en) 1981-03-31
IN156422B ( ) 1985-07-27
DD125023A5 ( ) 1977-03-23

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