PL113546B1 - Data processing system particularly applicable to a register for stream data processing systems - Google Patents

Data processing system particularly applicable to a register for stream data processing systems Download PDF

Info

Publication number
PL113546B1
PL113546B1 PL1977195820A PL19582077A PL113546B1 PL 113546 B1 PL113546 B1 PL 113546B1 PL 1977195820 A PL1977195820 A PL 1977195820A PL 19582077 A PL19582077 A PL 19582077A PL 113546 B1 PL113546 B1 PL 113546B1
Authority
PL
Poland
Prior art keywords
register
marker
circuit
sequence
signal
Prior art date
Application number
PL1977195820A
Other languages
English (en)
Polish (pl)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of PL113546B1 publication Critical patent/PL113546B1/pl

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/30134—Register stacks; shift registers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
    • G06F9/345—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes of multiple operands or results
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
    • G06F9/384—Register renaming
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
    • G06F9/3858—Result writeback, i.e. updating the architectural state or memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
    • G06F9/3863—Recovery, e.g. branch miss-prediction, exception handling using multiple copies of the architectural state, e.g. shadow registers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
  • Image Processing (AREA)
PL1977195820A 1976-02-06 1977-02-04 Data processing system particularly applicable to a register for stream data processing systems PL113546B1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB4684/76A GB1506972A (en) 1976-02-06 1976-02-06 Data processing systems

Publications (1)

Publication Number Publication Date
PL113546B1 true PL113546B1 (en) 1980-12-31

Family

ID=9781852

Family Applications (1)

Application Number Title Priority Date Filing Date
PL1977195820A PL113546B1 (en) 1976-02-06 1977-02-04 Data processing system particularly applicable to a register for stream data processing systems

Country Status (7)

Country Link
US (1) US4112489A (enExample)
JP (1) JPS52115640A (enExample)
AU (1) AU509432B2 (enExample)
DE (1) DE2704842C2 (enExample)
GB (1) GB1506972A (enExample)
PL (1) PL113546B1 (enExample)
ZA (1) ZA77658B (enExample)

Families Citing this family (55)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1980000043A1 (en) * 1978-06-09 1980-01-10 Ncr Co A digital pipelined computer
US4305124A (en) * 1978-06-09 1981-12-08 Ncr Corporation Pipelined computer
US4307447A (en) * 1979-06-19 1981-12-22 Gould Inc. Programmable controller
US4295193A (en) * 1979-06-29 1981-10-13 International Business Machines Corporation Machine for multiple instruction execution
JPS5621242A (en) * 1979-07-28 1981-02-27 Fujitsu Ltd Pipeline control method for computer operation
US4598358A (en) * 1980-02-11 1986-07-01 At&T Bell Laboratories Pipelined digital signal processor using a common data and control bus
JPS5832427B2 (ja) * 1980-02-14 1983-07-13 株式会社日立製作所 多重情報処理システム
US4428048A (en) 1981-01-28 1984-01-24 Grumman Aerospace Corporation Multiprocessor with staggered processing
US4646236A (en) * 1981-04-17 1987-02-24 International Business Machines Corp. Pipelined control apparatus with multi-process address storage
US4399507A (en) * 1981-06-30 1983-08-16 Ibm Corporation Instruction address stack in the data memory of an instruction-pipelined processor
JPS5848146A (ja) * 1981-09-18 1983-03-22 Toshiba Corp 命令先取り方式
US4541045A (en) * 1981-09-21 1985-09-10 Racal-Milgo, Inc. Microprocessor architecture employing efficient operand and instruction addressing
JPS58189739A (ja) * 1982-04-30 1983-11-05 Hitachi Ltd デ−タ処理システム
JPS592143A (ja) * 1982-06-29 1984-01-07 Hitachi Ltd 情報処理装置
US4521851A (en) * 1982-10-13 1985-06-04 Honeywell Information Systems Inc. Central processor
JPS5995660A (ja) * 1982-11-22 1984-06-01 Nec Corp デ−タ処理装置
US4630230A (en) * 1983-04-25 1986-12-16 Cray Research, Inc. Solid state storage device
JPS6033635A (ja) * 1983-08-05 1985-02-21 Nec Corp パイプライン制御方式
US4800486A (en) * 1983-09-29 1989-01-24 Tandem Computers Incorporated Multiple data patch CPU architecture
US5093775A (en) * 1983-11-07 1992-03-03 Digital Equipment Corporation Microcode control system for digital data processing system
JPS60112144A (ja) * 1983-11-24 1985-06-18 Nec Corp 制御信号転送方式
JPS60120439A (ja) * 1983-12-05 1985-06-27 Nec Corp 演算処理装置
US4814978A (en) * 1986-07-15 1989-03-21 Dataflow Computer Corporation Dataflow processing element, multiprocessor, and processes
US4745605A (en) * 1986-08-19 1988-05-17 Amadahl Corporation Control word error detection and classification
JPS63123130A (ja) * 1986-11-12 1988-05-26 Fanuc Ltd パイプライン制御方式
US5127104A (en) * 1986-12-29 1992-06-30 Dataflow Computer Corporation Method and product involving translation and execution of programs by automatic partitioning and data structure allocation
JPH0760388B2 (ja) * 1987-06-09 1995-06-28 三菱電機株式会社 パイプライン制御回路
JPS63317828A (ja) * 1987-06-19 1988-12-26 Fujitsu Ltd マイクロコ−ド読み出し制御方式
US5031096A (en) * 1988-06-30 1991-07-09 International Business Machines Corporation Method and apparatus for compressing the execution time of an instruction stream executing in a pipelined processor
GB8817911D0 (en) * 1988-07-27 1988-09-01 Int Computers Ltd Data processing apparatus
US5150469A (en) * 1988-12-12 1992-09-22 Digital Equipment Corporation System and method for processor pipeline control by selective signal deassertion
US5142638A (en) * 1989-02-07 1992-08-25 Cray Research, Inc. Apparatus for sharing memory in a multiprocessor system
US4951246A (en) * 1989-08-08 1990-08-21 Cray Research, Inc. Nibble-mode dram solid state storage device
US5524255A (en) * 1989-12-29 1996-06-04 Cray Research, Inc. Method and apparatus for accessing global registers in a multiprocessor system
US5251306A (en) * 1990-01-16 1993-10-05 Advanced Micro Devices, Inc. Apparatus for controlling execution of a program in a computing device
JPH0410041A (ja) * 1990-04-27 1992-01-14 Toshiba Corp データ退避方式
US5335330A (en) * 1990-05-14 1994-08-02 Matsushita Electric Industrial Co., Ltd. Information processing apparatus with optimization programming
JP2580396B2 (ja) * 1991-01-31 1997-02-12 富士通株式会社 パイプラインにおける分岐命令制御方式
GB9114513D0 (en) 1991-07-04 1991-08-21 Univ Manchester Condition detection in asynchronous pipelines
AU665368B2 (en) * 1992-02-27 1996-01-04 Samsung Electronics Co., Ltd. CPU having pipelined instruction unit and effective address calculation unit with retained virtual address capability
US5619668A (en) * 1992-08-10 1997-04-08 Intel Corporation Apparatus for register bypassing in a microprocessor
DE69430352T2 (de) * 1993-10-21 2003-01-30 Sun Microsystems Inc., Mountain View Gegenflusspipeline
EP0650116B1 (en) * 1993-10-21 1998-12-09 Sun Microsystems, Inc. Counterflow pipeline processor
US5706459A (en) * 1994-01-06 1998-01-06 Fujitsu Limited Processor having a variable number of stages in a pipeline
US6092184A (en) * 1995-12-28 2000-07-18 Intel Corporation Parallel processing of pipelined instructions having register dependencies
US5764943A (en) * 1995-12-28 1998-06-09 Intel Corporation Data path circuitry for processor having multiple instruction pipelines
US6044460A (en) * 1998-01-16 2000-03-28 Lsi Logic Corporation System and method for PC-relative address generation in a microprocessor with a pipeline architecture
US6633971B2 (en) * 1999-10-01 2003-10-14 Hitachi, Ltd. Mechanism for forward data in a processor pipeline using a single pipefile connected to the pipeline
US7496734B1 (en) * 2000-04-28 2009-02-24 Stmicroelectronics, Inc. System and method for handling register dependency in a stack-based pipelined processor
US6633969B1 (en) 2000-08-11 2003-10-14 Lsi Logic Corporation Instruction translation system and method achieving single-cycle translation of variable-length MIPS16 instructions
US6665755B2 (en) * 2000-12-22 2003-12-16 Nortel Networks Limited External memory engine selectable pipeline architecture
US20020099932A1 (en) * 2001-01-25 2002-07-25 Muro Manuel R. Mirroring processor stack
FR2820220B1 (fr) * 2001-01-31 2003-03-28 Jean Roland Riviere Dispositif a processeur rapide pour le traitement de donnees et procede s'y rattachant
TWI269228B (en) * 2003-01-07 2006-12-21 Ibm Floating point unit, processor chip, and computer system to resolve data dependencies
KR20250003191A (ko) * 2023-06-30 2025-01-07 에스케이하이닉스 주식회사 데이터 저장 시스템 내 복수의 동작을 분산 처리하는 장치 및 동작 방법

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3771137A (en) * 1971-09-10 1973-11-06 Ibm Memory control in a multipurpose system utilizing a broadcast
GB1448866A (en) * 1973-04-13 1976-09-08 Int Computers Ltd Microprogrammed data processing systems
GB1443777A (en) * 1973-07-19 1976-07-28 Int Computers Ltd Data processing apparatus
US3875391A (en) * 1973-11-02 1975-04-01 Raytheon Co Pipeline signal processor
US3900836A (en) * 1973-11-30 1975-08-19 Ibm Interleaved memory control signal handling apparatus using pipelining techniques
US3978452A (en) * 1974-02-28 1976-08-31 Burroughs Corporation System and method for concurrent and pipeline processing employing a data driven network

Also Published As

Publication number Publication date
DE2704842C2 (de) 1984-10-31
US4112489A (en) 1978-09-05
GB1506972A (en) 1978-04-12
JPS52115640A (en) 1977-09-28
JPS568380B2 (enExample) 1981-02-23
DE2704842A1 (de) 1977-08-11
AU509432B2 (en) 1980-05-15
ZA77658B (en) 1977-12-28
AU2196177A (en) 1978-08-10

Similar Documents

Publication Publication Date Title
PL113546B1 (en) Data processing system particularly applicable to a register for stream data processing systems
US4079451A (en) Word, byte and bit indexed addressing in a data processing system
JP3098071B2 (ja) 条件付き分岐を有するプログラムの効率的実行をするためのコンピュータシステム
US5276895A (en) Massively parallel array processing system
JP6467743B2 (ja) 汎用ユニットにもとづいた高性能プロセッサ・システムとその方法
JP3452929B2 (ja) マルチプロセッサ
US4047247A (en) Address formation in a microprogrammed data processing system
EP0745933A2 (en) Multiple port register file with interleaved write ports
EP0724221A2 (en) Method and apparatus for executing dissimilar seq. of instructions in the processor of a single-instruction-multiple data (SIMD) computer
CN105005463B (zh) 具有世代重命名的计算机处理器
JPS6231379B2 (enExample)
US7143271B2 (en) Automatic register backup/restore system and method
US5420997A (en) Memory having concurrent read and writing from different addresses
US5961575A (en) Microprocessor having combined shift and rotate circuit
US3116410A (en) Simple general purpose digital computer
EP0649083A2 (en) A microcontrol unit for a superpipelined, superscalar microprocessor
US6766445B2 (en) Storage system for use in custom loop accelerators and the like
US5991874A (en) Conditional move using a compare instruction generating a condition field
KR20020025703A (ko) 리네이밍 장치 및 프로세서
JP2000347854A (ja) 復号装置および復号方法
JP3841967B2 (ja) マイクロプロセッサ
Comfort A modified Holland machine
US6707831B1 (en) Mechanism for data forwarding
JPS594049B2 (ja) コンピュ−タ装置
WO1988009995A1 (en) Pipeline memory structure