NO995827L - Mønsterlegging med tynnfilm- og laminatteknikk - Google Patents

Mønsterlegging med tynnfilm- og laminatteknikk

Info

Publication number
NO995827L
NO995827L NO995827A NO995827A NO995827L NO 995827 L NO995827 L NO 995827L NO 995827 A NO995827 A NO 995827A NO 995827 A NO995827 A NO 995827A NO 995827 L NO995827 L NO 995827L
Authority
NO
Norway
Prior art keywords
thin film
laminate technique
pattern layering
layering
pattern
Prior art date
Application number
NO995827A
Other languages
English (en)
Other versions
NO995827D0 (no
Inventor
Yuji Toyota
Yoshihiro Koshido
Kei Fujibayashi
Ryoichirio Takahashi
Tadyuki Okawa
Original Assignee
Murata Manufacturing Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co filed Critical Murata Manufacturing Co
Publication of NO995827D0 publication Critical patent/NO995827D0/no
Publication of NO995827L publication Critical patent/NO995827L/no

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02178Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing aluminium, e.g. Al2O3
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02186Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing titanium, e.g. TiO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02192Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing at least one rare earth metal element, e.g. oxides of lanthanides, scandium or yttrium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/022Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0272Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers for lift-off processes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • H01L21/316Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/31604Deposition from a gas or vapour
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0237High frequency adaptations
    • H05K1/024Dielectric details, e.g. changing the dielectric material around a transmission line
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/04Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
    • H05K3/046Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by selective transfer or selective detachment of a conductive layer
    • H05K3/048Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by selective transfer or selective detachment of a conductive layer using a lift-off resist pattern or a release layer pattern
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/942Masking
    • Y10S438/948Radiation resist
    • Y10S438/951Lift-off

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Formation Of Insulating Films (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Drying Of Semiconductors (AREA)
  • Waveguides (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
NO995827A 1998-11-27 1999-11-26 Mønsterlegging med tynnfilm- og laminatteknikk NO995827L (no)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP33786898A JP3368852B2 (ja) 1998-11-27 1998-11-27 積層パターンの形成方法

Publications (2)

Publication Number Publication Date
NO995827D0 NO995827D0 (no) 1999-11-26
NO995827L true NO995827L (no) 2000-05-29

Family

ID=18312753

Family Applications (1)

Application Number Title Priority Date Filing Date
NO995827A NO995827L (no) 1998-11-27 1999-11-26 Mønsterlegging med tynnfilm- og laminatteknikk

Country Status (7)

Country Link
US (1) US6156672A (no)
EP (1) EP1005073A1 (no)
JP (1) JP3368852B2 (no)
KR (1) KR100442700B1 (no)
CN (1) CN1188902C (no)
CA (1) CA2290764C (no)
NO (1) NO995827L (no)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6291283B1 (en) * 1998-11-09 2001-09-18 Texas Instruments Incorporated Method to form silicates as high dielectric constant materials
JP2000208508A (ja) 1999-01-13 2000-07-28 Texas Instr Inc <Ti> 珪酸塩高誘電率材料の真空蒸着
JP3520853B2 (ja) * 2001-01-26 2004-04-19 株式会社村田製作所 弾性表面波素子及びその製造方法
DE10114956C2 (de) 2001-03-27 2003-06-18 Infineon Technologies Ag Verfahren zum Herstellen einer dielektrischen Schicht als Isolatorschicht für einen Grabenkondensator
EP1260863A1 (en) * 2001-05-23 2002-11-27 Scandinavian Micro Biodevices Micropatterning of plasma polymerized coatings
JP2005081335A (ja) * 2003-09-11 2005-03-31 Seiko Epson Corp パターン形成方法、導電性薄膜、電気光学装置、電子機器
JP4408787B2 (ja) * 2004-10-19 2010-02-03 株式会社神戸製鋼所 絶縁膜及びその製造方法、並びに絶縁膜を備えた電子デバイス
JP2007144992A (ja) * 2005-10-28 2007-06-14 Fujifilm Corp 凹凸構造体とその製造方法、圧電素子、インクジェット式記録ヘッド、インクジェット式記録装置
US8000841B2 (en) * 2005-12-30 2011-08-16 Rosemount Inc. Power management in a process transmitter
US8623737B2 (en) * 2006-03-31 2014-01-07 Intel Corporation Sol-gel and mask patterning for thin-film capacitor fabrication, thin-film capacitors fabricated thereby, and systems containing same
US7816842B2 (en) * 2007-03-26 2010-10-19 Fujifilm Corporation Patterned inorganic film formed of an inorganic material on a metal film having a surface which includes a plurality of surface-oxidized areas, piezoelectric device having the patterned inorganic film, and process for producing the inorganic film
WO2008141481A1 (fr) 2007-05-24 2008-11-27 Princo Corp. Structure et procédé de fabrication d'un câblage métallique sur une carte multicouches
TWI354523B (en) * 2007-05-25 2011-12-11 Princo Corp Method for manufacturing metal lines in multi-laye
US8815333B2 (en) 2007-12-05 2014-08-26 Princo Middle East Fze Manufacturing method of metal structure in multi-layer substrate
JP5596312B2 (ja) * 2009-08-04 2014-09-24 スタンレー電気株式会社 誘電体薄膜デバイスの製造方法
US9613848B2 (en) 2015-02-12 2017-04-04 Infineon Technologies Ag Dielectric structures with negative taper and methods of formation thereof
CN108153106A (zh) * 2017-12-27 2018-06-12 深圳市华星光电技术有限公司 光罩及图案化方法
CN113242843A (zh) * 2019-12-17 2021-08-10 深圳市大富科技股份有限公司 一种陶瓷材料及其制备方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4284706A (en) * 1979-12-03 1981-08-18 International Business Machines Corporation Lithographic resist composition for a lift-off process
JPS61108172A (ja) * 1984-11-01 1986-05-26 Matsushita Electric Ind Co Ltd 薄膜トランジスタの製造方法
US5190892A (en) * 1988-08-11 1993-03-02 Oki Electric Industry Co., Ltd. Method for forming pattern using lift-off
JPH02203511A (ja) * 1989-02-02 1990-08-13 Matsushita Electric Ind Co Ltd 薄膜コンデンサの形成方法
JP2537563Y2 (ja) * 1989-03-20 1997-06-04 東横化学 株式会社 縦型減圧気相成長装置
JP2570607B2 (ja) * 1993-12-20 1997-01-08 日本電気株式会社 キャパシタの製造方法
JPH07300684A (ja) * 1994-04-28 1995-11-14 Matsushita Electric Ind Co Ltd 金属薄膜パターンの形成方法

Also Published As

Publication number Publication date
NO995827D0 (no) 1999-11-26
CN1255738A (zh) 2000-06-07
JP3368852B2 (ja) 2003-01-20
CA2290764C (en) 2004-02-03
CA2290764A1 (en) 2000-05-27
CN1188902C (zh) 2005-02-09
KR100442700B1 (ko) 2004-08-02
EP1005073A1 (en) 2000-05-31
JP2000164575A (ja) 2000-06-16
US6156672A (en) 2000-12-05
KR20000047722A (ko) 2000-07-25

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