NO944341L - Fremgangsmåte for samregistrering av halvlederskiver som bearbeides i en eller flere blind-prosessmoduler - Google Patents

Fremgangsmåte for samregistrering av halvlederskiver som bearbeides i en eller flere blind-prosessmoduler

Info

Publication number
NO944341L
NO944341L NO944341A NO944341A NO944341L NO 944341 L NO944341 L NO 944341L NO 944341 A NO944341 A NO 944341A NO 944341 A NO944341 A NO 944341A NO 944341 L NO944341 L NO 944341L
Authority
NO
Norway
Prior art keywords
semiconductor wafer
location
processing module
axes
register
Prior art date
Application number
NO944341A
Other languages
English (en)
Other versions
NO944341D0 (no
Inventor
George J Gardopee
Paul J Clapis
Joseph P Prusak
Sherman K Poultney
Original Assignee
Hughes Aircraft Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hughes Aircraft Co filed Critical Hughes Aircraft Co
Publication of NO944341D0 publication Critical patent/NO944341D0/no
Publication of NO944341L publication Critical patent/NO944341L/no

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67796—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations with angular orientation of workpieces
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00—Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/038—Indexing scheme relating to G06F3/038
    • G06F2203/0382—Plural input, i.e. interface arrangements in which a plurality of input device of the same type are in communication with a PC
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/162—Testing steps
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S414/00—Material or article handling
    • Y10S414/135—Associated with semiconductor wafer handling
    • Y10S414/136—Associated with semiconductor wafer handling including wafer orienting means

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

Fremgangsmåte for å bringe i samregister en halvlederskive (14), som utsettes for bearbeidelse 1 en eller flere bllnd-behandllngsmoduler (10, 12) hvor det kreves en Innretning (16, 18) for entydig og gjentagbar å bringe halvlederskiven (14) i register i forhold til hver behandlingsmodul (10, 12). Lokaliseringen av koordinataksene til hver behandlIngsmodul (10, 12) bestemmes i forhold til posisjonen til halvlederskiven (14) som er blitt bragt i register deri. Ved hjelp av foreliggende oppfinnelse er det tilveiebragt tre metoder for å bestemme lokaliseringen av følgende akser: (1) en absolutt lokalisering av aksene, (2) en relativ lokalisering av aksene ved anvendelse av efi blind-behandlingsmodul (10) for å måle posisjonen til et mønster etset inn i en halvlederskive (14) med en annen bllnd-behandlingsmodul (12), og (3) en relativ lokalisering av aksen ved å anvende en blind-behandlingsmodul (10) for å måle overflate eller sjikttykk-elsekarakteristikken i halvlederskiven (14) som er modifisert ved skivebehandling. Uansett hvilken metode som anvendes, blir bestemmelsen av lokaliseringen av koordinataksen i hver behandlingsmodul (10, 12), en effektiv anbringelse av halvlederskiven (14) i samregister.
NO944341A 1993-11-15 1994-11-14 Fremgangsmåte for samregistrering av halvlederskiver som bearbeides i en eller flere blind-prosessmoduler NO944341L (no)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/152,780 US5610102A (en) 1993-11-15 1993-11-15 Method for co-registering semiconductor wafers undergoing work in one or more blind process modules

Publications (2)

Publication Number Publication Date
NO944341D0 NO944341D0 (no) 1994-11-14
NO944341L true NO944341L (no) 1995-05-16

Family

ID=22544414

Family Applications (1)

Application Number Title Priority Date Filing Date
NO944341A NO944341L (no) 1993-11-15 1994-11-14 Fremgangsmåte for samregistrering av halvlederskiver som bearbeides i en eller flere blind-prosessmoduler

Country Status (5)

Country Link
US (1) US5610102A (no)
EP (1) EP0653781A1 (no)
JP (1) JPH07221167A (no)
IL (1) IL111474A0 (no)
NO (1) NO944341L (no)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5980195A (en) * 1996-04-24 1999-11-09 Tokyo Electron, Ltd. Positioning apparatus for substrates to be processed
US6122562A (en) * 1997-05-05 2000-09-19 Applied Materials, Inc. Method and apparatus for selectively marking a semiconductor wafer
US6388226B1 (en) 1997-06-26 2002-05-14 Applied Science And Technology, Inc. Toroidal low-field reactive gas source
US6150628A (en) 1997-06-26 2000-11-21 Applied Science And Technology, Inc. Toroidal low-field reactive gas source
US7569790B2 (en) * 1997-06-26 2009-08-04 Mks Instruments, Inc. Method and apparatus for processing metal bearing gases
US6815633B1 (en) 1997-06-26 2004-11-09 Applied Science & Technology, Inc. Inductively-coupled toroidal plasma source
US8779322B2 (en) 1997-06-26 2014-07-15 Mks Instruments Inc. Method and apparatus for processing metal bearing gases
US7166816B1 (en) * 1997-06-26 2007-01-23 Mks Instruments, Inc. Inductively-coupled torodial plasma source
JP3998418B2 (ja) * 1998-01-16 2007-10-24 ブルックス オートメーション インコーポレイテッド 半導体ウエファーカセットの位置決め及び検知機構
US6300644B1 (en) 1998-12-21 2001-10-09 Microtool, Inc. Tool for aligning a robot arm to a cassette for holding semiconductor wafers
TW469483B (en) * 1999-04-19 2001-12-21 Applied Materials Inc Method and apparatus for aligning a cassette
US6763281B2 (en) 1999-04-19 2004-07-13 Applied Materials, Inc Apparatus for alignment of automated workpiece handling systems
US6347291B1 (en) * 2000-01-05 2002-02-12 Lsi Logic Corporation Substrate position location system
US6782596B2 (en) 2001-02-13 2004-08-31 University Of North Carolina At Charlotte Fiducial calibration systems and methods for manufacturing, inspection, and assembly
JP4640290B2 (ja) * 2005-11-21 2011-03-02 日産自動車株式会社 ワーク移し替えのための方法及びシステム
DE102007036814A1 (de) * 2007-08-03 2009-02-12 Vistec Semiconductor Systems Gmbh Koordinaten-Messmaschine zum Vermessen von Strukturen auf einem Substrat
CN104900560B (zh) * 2014-03-06 2017-12-01 联咏科技股份有限公司 可挑拣高长宽比晶粒的晶粒挑拣装置及方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3875414A (en) * 1973-08-20 1975-04-01 Secr Defence Brit Methods suitable for use in or in connection with the production of microelectronic devices
US4644172A (en) * 1984-02-22 1987-02-17 Kla Instruments Corporation Electronic control of an automatic wafer inspection system
JPH0619670B2 (ja) * 1984-12-17 1994-03-16 株式会社デイスコ 自動精密位置合せシステム
EP0311624A1 (en) * 1986-06-24 1989-04-19 Lothian Microfabrication Limited Improved registration method in photolithography and equipment for carrying out this method
US4752898A (en) * 1987-01-28 1988-06-21 Tencor Instruments Edge finding in wafers
US5352249A (en) * 1992-08-28 1994-10-04 Hughes Aircraft Company Apparatus for providing consistent, non-jamming registration of semiconductor wafers

Also Published As

Publication number Publication date
IL111474A0 (en) 1994-12-29
JPH07221167A (ja) 1995-08-18
EP0653781A1 (en) 1995-05-17
US5610102A (en) 1997-03-11
NO944341D0 (no) 1994-11-14

Similar Documents

Publication Publication Date Title
NO944341L (no) Fremgangsmåte for samregistrering av halvlederskiver som bearbeides i en eller flere blind-prosessmoduler
WO2003044851A3 (en) Method and apparatus for utilizing integrated metrology data as feed-forward data
TW429481B (en) Process for treating semiconductor substrates and structures obtained by this process
ATE109924T1 (de) Verfahren zum ätzen von halbleiterscheiben mit halogenid in gegenwart von wasser.
WO2002101803A1 (fr) Masque et procede de production d'un tel masque, procede de production d'un dispositif semi-conducteur
ATE459982T1 (de) Verfahren und vorrichtung zum herstellen eines gebondeten dielektrischen trennungswafers
EP0062302A3 (en) End-point detection in plasma etching of phosphosilicate glass
ATA106097A (de) Träger für scheibenförmige gegenstände, insbesondere silizium-wafer
WO2000066549A3 (en) Apparatus and methods for collecting global data during a reticle inspection
ID17230A (id) Metode memproses lapisan bawah
NO944384L (no) Fremgangsmåte for å gjöre mikrostrukturer plane
KR910007100A (ko) 기판 처리 장치 및 기판 처리방법
WO2002045166A3 (en) Method for eliminating crack damage at interfaces in integrated circuits
EP0750967A3 (en) Method for preshaping a semiconductor substrate for polishing and structure
WO2002009176A3 (de) Verfahren zum aufbringen von justiermarken auf einer halbleiterscheibe
ATE332211T1 (de) Verbindungssystem zum befestigen von halbleiterplatten sowie verfahren zur herstellung von halbleiterplatten
JPS5651732A (en) Exposure processing method
JP3074858B2 (ja) 半導体基板の表面処理装置及び表面処理方法
TW349254B (en) Method of measuring the depth of processing deformation layer of a semiconductor wafer
WO2003017006A3 (en) A method of substrate processing and photoresist exposure
WO2005050310A3 (en) Phase shift photomask and method for improving printability of a structure on a wafer
KR950030229A (ko) 웨이퍼 패턴의 얼라인 방법
JPS62198125A (ja) ドライエツチング方法
DE3869782D1 (de) Verfahren zur herstellung auf zwei seiten von anordnungen von verduenntem silizium.
JPS6442132A (en) Formation of pattern