NL8900549A - Vergelijkschakeling bevattende een maskeermechanisme voor transiente verschillen, vergelijkschakelingssysteem, en verwerkingsinrichting bevattende zulke vergelijkschakelingen. - Google Patents

Vergelijkschakeling bevattende een maskeermechanisme voor transiente verschillen, vergelijkschakelingssysteem, en verwerkingsinrichting bevattende zulke vergelijkschakelingen. Download PDF

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Publication number
NL8900549A
NL8900549A NL8900549A NL8900549A NL8900549A NL 8900549 A NL8900549 A NL 8900549A NL 8900549 A NL8900549 A NL 8900549A NL 8900549 A NL8900549 A NL 8900549A NL 8900549 A NL8900549 A NL 8900549A
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NL
Netherlands
Prior art keywords
signal
comparative
signals
output
gate
Prior art date
Application number
NL8900549A
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English (en)
Dutch (nl)
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Priority to NL8900549A priority Critical patent/NL8900549A/nl
Priority to EP90200480A priority patent/EP0386831A1/en
Priority to KR1019900002805A priority patent/KR900015453A/ko
Priority to US07/490,128 priority patent/US5157673A/en
Priority to JP2053871A priority patent/JPH02272907A/ja
Publication of NL8900549A publication Critical patent/NL8900549A/nl

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/02Comparing digital values
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/22Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
    • H03K5/26Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being duration, interval, position, frequency, or sequence
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/1629Error detection by comparing the output of redundant processing systems
    • G06F11/1641Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/1695Error detection or correction of the data by redundancy in hardware which are operating with time diversity

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Mathematical Optimization (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Manipulation Of Pulses (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Hardware Redundancy (AREA)
NL8900549A 1989-03-07 1989-03-07 Vergelijkschakeling bevattende een maskeermechanisme voor transiente verschillen, vergelijkschakelingssysteem, en verwerkingsinrichting bevattende zulke vergelijkschakelingen. NL8900549A (nl)

Priority Applications (5)

Application Number Priority Date Filing Date Title
NL8900549A NL8900549A (nl) 1989-03-07 1989-03-07 Vergelijkschakeling bevattende een maskeermechanisme voor transiente verschillen, vergelijkschakelingssysteem, en verwerkingsinrichting bevattende zulke vergelijkschakelingen.
EP90200480A EP0386831A1 (en) 1989-03-07 1990-03-01 Comparison circuit comprising a masking mechanism for masking transient differences, comparison circuit system, and processing device comprising such comparison circuit
KR1019900002805A KR900015453A (ko) 1989-03-07 1990-03-05 두개의 이진수 신호를 비교하기 위한 비교회로, 비교회로 시스템 및 그런 비교 회로를 포함한 처리 회로
US07/490,128 US5157673A (en) 1989-03-07 1990-03-07 Comparison circuit for masking transient differences
JP2053871A JPH02272907A (ja) 1989-03-07 1990-03-07 比較回路

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NL8900549 1989-03-07
NL8900549A NL8900549A (nl) 1989-03-07 1989-03-07 Vergelijkschakeling bevattende een maskeermechanisme voor transiente verschillen, vergelijkschakelingssysteem, en verwerkingsinrichting bevattende zulke vergelijkschakelingen.

Publications (1)

Publication Number Publication Date
NL8900549A true NL8900549A (nl) 1990-10-01

Family

ID=19854251

Family Applications (1)

Application Number Title Priority Date Filing Date
NL8900549A NL8900549A (nl) 1989-03-07 1989-03-07 Vergelijkschakeling bevattende een maskeermechanisme voor transiente verschillen, vergelijkschakelingssysteem, en verwerkingsinrichting bevattende zulke vergelijkschakelingen.

Country Status (5)

Country Link
US (1) US5157673A (ja)
EP (1) EP0386831A1 (ja)
JP (1) JPH02272907A (ja)
KR (1) KR900015453A (ja)
NL (1) NL8900549A (ja)

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JP3617569B2 (ja) * 1996-04-24 2005-02-09 沖電気工業株式会社 多ビット一致回路
US5754458A (en) * 1996-05-30 1998-05-19 Hewlett-Packard Company Trailing bit anticipator
US5784386A (en) * 1996-07-03 1998-07-21 General Signal Corporation Fault tolerant synchronous clock distribution
US5881224A (en) * 1996-09-10 1999-03-09 Hewlett-Packard Company Apparatus and method for tracking events in a microprocessor that can retire more than one instruction during a clock cycle
US5887003A (en) * 1996-09-10 1999-03-23 Hewlett-Packard Company Apparatus and method for comparing a group of binary fields with an expected pattern to generate match results
US6003107A (en) * 1996-09-10 1999-12-14 Hewlett-Packard Company Circuitry for providing external access to signals that are internal to an integrated circuit chip package
US5867644A (en) * 1996-09-10 1999-02-02 Hewlett Packard Company System and method for on-chip debug support and performance monitoring in a microprocessor
US5956476A (en) * 1996-10-31 1999-09-21 Hewlett Packard Company Circuitry and method for detecting signal patterns on a bus using dynamically changing expected patterns
US5880671A (en) * 1996-10-31 1999-03-09 Hewlett-Packard Company Flexible circuitry and method for detecting signal patterns on a bus
US5956477A (en) * 1996-11-25 1999-09-21 Hewlett-Packard Company Method for processing information in a microprocessor to facilitate debug and performance monitoring
US5881217A (en) * 1996-11-27 1999-03-09 Hewlett-Packard Company Input comparison circuitry and method for a programmable state machine
US6009539A (en) * 1996-11-27 1999-12-28 Hewlett-Packard Company Cross-triggering CPUs for enhanced test operations in a multi-CPU computer system
US6374370B1 (en) 1998-10-30 2002-04-16 Hewlett-Packard Company Method and system for flexible control of BIST registers based upon on-chip events
DE102005049232A1 (de) * 2005-10-14 2007-04-26 Infineon Technologies Ag Integrierter Schaltkreis und Verfahren zum Betreiben eines integrierten Schaltkreises
JP2012103882A (ja) * 2010-11-10 2012-05-31 Nippon Signal Co Ltd:The 2重系演算処理装置の監視装置
US9964597B2 (en) * 2016-09-01 2018-05-08 Texas Instruments Incorporated Self test for safety logic

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Publication number Priority date Publication date Assignee Title
US3634769A (en) * 1969-12-12 1972-01-11 Relex Corp Sequential gating circuit
US3660647A (en) * 1969-12-24 1972-05-02 Us Navy Automatic signal delay tracking system
US3618015A (en) * 1970-06-30 1971-11-02 Gte Automatic Electric Lab Inc Apparatus for discriminating between errors and faults
US3810119A (en) * 1971-05-04 1974-05-07 Us Navy Processor synchronization scheme
IT1111606B (it) * 1978-03-03 1986-01-13 Cselt Centro Studi Lab Telecom Sistema elaborativo modulare multiconfigurabile integrato con un sistema di preelaborazione
US4342112A (en) * 1980-09-08 1982-07-27 Rockwell International Corporation Error checking circuit
JPS5952492A (ja) * 1982-09-17 1984-03-27 Fujitsu Ltd スタテイツク型半導体記憶装置
DE3306724A1 (de) * 1983-02-25 1984-08-30 Siemens AG, 1000 Berlin und 8000 München Verfahren zum betrieb einer fehlererkennungsschaltung
US4566101A (en) * 1983-02-28 1986-01-21 United Technologies Corporation Oscillatory failure monitor
DE3335156A1 (de) * 1983-09-28 1985-04-04 Siemens AG, 1000 Berlin und 8000 München Verfahren zur erkennung des ausfalls eines oder mehrerer uebertragungskanaele in einem redundant ausgelegten optischen uebertragungssystem
US4821271A (en) * 1987-07-30 1989-04-11 Intel Corporation Methods and circuits for checking integrated circuit chips having programmable outputs

Also Published As

Publication number Publication date
JPH02272907A (ja) 1990-11-07
US5157673A (en) 1992-10-20
EP0386831A1 (en) 1990-09-12
KR900015453A (ko) 1990-10-27

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