NL8700530A - Pijplijnsysteem met parallelle data-beschrijving. - Google Patents

Pijplijnsysteem met parallelle data-beschrijving. Download PDF

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Publication number
NL8700530A
NL8700530A NL8700530A NL8700530A NL8700530A NL 8700530 A NL8700530 A NL 8700530A NL 8700530 A NL8700530 A NL 8700530A NL 8700530 A NL8700530 A NL 8700530A NL 8700530 A NL8700530 A NL 8700530A
Authority
NL
Netherlands
Prior art keywords
data
pipeline system
module
modules
delay
Prior art date
Application number
NL8700530A
Other languages
English (en)
Dutch (nl)
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Priority to NL8700530A priority Critical patent/NL8700530A/nl
Priority to US07/161,566 priority patent/US4916659A/en
Priority to EP88200335A priority patent/EP0285192B1/en
Priority to DE8888200335T priority patent/DE3867879D1/de
Priority to JP63048779A priority patent/JP2542665B2/ja
Publication of NL8700530A publication Critical patent/NL8700530A/nl

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/20—Processor architectures; Processor configuration, e.g. pipelining

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Image Processing (AREA)
  • Multi Processors (AREA)
  • Advance Control (AREA)
NL8700530A 1987-03-05 1987-03-05 Pijplijnsysteem met parallelle data-beschrijving. NL8700530A (nl)

Priority Applications (5)

Application Number Priority Date Filing Date Title
NL8700530A NL8700530A (nl) 1987-03-05 1987-03-05 Pijplijnsysteem met parallelle data-beschrijving.
US07/161,566 US4916659A (en) 1987-03-05 1988-02-18 Pipeline system with parallel data identification and delay of data identification signals
EP88200335A EP0285192B1 (en) 1987-03-05 1988-02-24 Pipeline system with parallel data identification
DE8888200335T DE3867879D1 (de) 1987-03-05 1988-02-24 Pipeline-system mit paralleler datenidentifizierung.
JP63048779A JP2542665B2 (ja) 1987-03-05 1988-03-03 パイプラインシステム

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NL8700530 1987-03-05
NL8700530A NL8700530A (nl) 1987-03-05 1987-03-05 Pijplijnsysteem met parallelle data-beschrijving.

Publications (1)

Publication Number Publication Date
NL8700530A true NL8700530A (nl) 1988-10-03

Family

ID=19849659

Family Applications (1)

Application Number Title Priority Date Filing Date
NL8700530A NL8700530A (nl) 1987-03-05 1987-03-05 Pijplijnsysteem met parallelle data-beschrijving.

Country Status (5)

Country Link
US (1) US4916659A (ja)
EP (1) EP0285192B1 (ja)
JP (1) JP2542665B2 (ja)
DE (1) DE3867879D1 (ja)
NL (1) NL8700530A (ja)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL8901825A (nl) * 1989-07-14 1991-02-01 Philips Nv Pijplijnsysteem met multi-resolutie dataverwerking op echte-tijd-basis.
US5287416A (en) * 1989-10-10 1994-02-15 Unisys Corporation Parallel pipelined image processor
WO1991006064A1 (en) * 1989-10-10 1991-05-02 Unisys Corporation Parallel pipelined image processor
US5572714A (en) * 1992-10-23 1996-11-05 Matsushita Electric Industrial Co., Ltd. Integrated circuit for pipeline data processing
JP3193525B2 (ja) * 1993-05-31 2001-07-30 キヤノン株式会社 情報処理装置
JPH0728642A (ja) * 1993-07-14 1995-01-31 Matsushita Electric Ind Co Ltd パイプライン演算器
US6151682A (en) * 1997-09-08 2000-11-21 Sarnoff Corporation Digital signal processing circuitry having integrated timing information
US6188381B1 (en) * 1997-09-08 2001-02-13 Sarnoff Corporation Modular parallel-pipelined vision system for real-time video processing
US6128677A (en) * 1997-10-15 2000-10-03 Intel Corporation System and method for improved transfer of data between multiple processors and I/O bridges
US6831755B1 (en) 1998-06-26 2004-12-14 Sony Corporation Printer having image correcting capability
EP1014275A1 (en) * 1998-12-23 2000-06-28 TELEFONAKTIEBOLAGET L M ERICSSON (publ) Pipeline processing for data channels
AU767372B2 (en) * 2000-08-03 2003-11-06 Canon Kabushiki Kaisha Combined control and data pipeline path in computer graphics system
US7484079B2 (en) * 2002-10-31 2009-01-27 Hewlett-Packard Development Company, L.P. Pipeline stage initialization via task frame accessed by a memory pointer propagated among the pipeline stages
JP4442644B2 (ja) * 2007-06-15 2010-03-31 株式会社デンソー パイプライン演算装置
TWI382515B (zh) * 2008-10-20 2013-01-11 Accton Wireless Broadband Corp 無線收發模組
US8856794B2 (en) * 2009-10-13 2014-10-07 Empire Technology Development Llc Multicore runtime management using process affinity graphs
US8627300B2 (en) * 2009-10-13 2014-01-07 Empire Technology Development Llc Parallel dynamic optimization
US8635606B2 (en) * 2009-10-13 2014-01-21 Empire Technology Development Llc Dynamic optimization using a resource cost registry
US8892931B2 (en) 2009-10-20 2014-11-18 Empire Technology Development Llc Power channel monitor for a multicore processor
WO2014185906A1 (en) 2013-05-15 2014-11-20 Empire Technology Development, Llc Core affinity bitmask translation

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4210962A (en) * 1978-06-30 1980-07-01 Systems Control, Inc. Processor for dynamic programming
JPS57155666A (en) * 1981-03-20 1982-09-25 Fujitsu Ltd Instruction controlling system of vector processor
US4574345A (en) * 1981-04-01 1986-03-04 Advanced Parallel Systems, Inc. Multiprocessor computer system utilizing a tapped delay line instruction bus

Also Published As

Publication number Publication date
US4916659A (en) 1990-04-10
EP0285192B1 (en) 1992-01-22
JPS63234323A (ja) 1988-09-29
EP0285192A1 (en) 1988-10-05
JP2542665B2 (ja) 1996-10-09
DE3867879D1 (de) 1992-03-05

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BV The patent application has lapsed