NL8301262A - Werkwijze voor het vervaardigen van een halfgeleiderinrichting, waarbij met behulp van ionenimplantatie patronen worden aangebracht in een laag siliciumnitride. - Google Patents

Werkwijze voor het vervaardigen van een halfgeleiderinrichting, waarbij met behulp van ionenimplantatie patronen worden aangebracht in een laag siliciumnitride. Download PDF

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Publication number
NL8301262A
NL8301262A NL8301262A NL8301262A NL8301262A NL 8301262 A NL8301262 A NL 8301262A NL 8301262 A NL8301262 A NL 8301262A NL 8301262 A NL8301262 A NL 8301262A NL 8301262 A NL8301262 A NL 8301262A
Authority
NL
Netherlands
Prior art keywords
layer
silicon nitride
ions
elevation
implanted
Prior art date
Application number
NL8301262A
Other languages
English (en)
Dutch (nl)
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Priority to NL8301262A priority Critical patent/NL8301262A/nl
Priority to US06/595,092 priority patent/US4514251A/en
Priority to DE8484200471T priority patent/DE3466133D1/de
Priority to EP84200471A priority patent/EP0122662B1/en
Priority to JP59071024A priority patent/JPS59198723A/ja
Publication of NL8301262A publication Critical patent/NL8301262A/nl

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/3115—Doping the insulating layers
    • H01L21/31155—Doping the insulating layers by ion implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • Element Separation (AREA)
  • Weting (AREA)
NL8301262A 1983-04-11 1983-04-11 Werkwijze voor het vervaardigen van een halfgeleiderinrichting, waarbij met behulp van ionenimplantatie patronen worden aangebracht in een laag siliciumnitride. NL8301262A (nl)

Priority Applications (5)

Application Number Priority Date Filing Date Title
NL8301262A NL8301262A (nl) 1983-04-11 1983-04-11 Werkwijze voor het vervaardigen van een halfgeleiderinrichting, waarbij met behulp van ionenimplantatie patronen worden aangebracht in een laag siliciumnitride.
US06/595,092 US4514251A (en) 1983-04-11 1984-03-30 Method of manufacturing a semiconductor device, in which patterns are formed in a layer of silicon nitride by means of ion implantation
DE8484200471T DE3466133D1 (en) 1983-04-11 1984-04-04 Method of manufacturing a semiconductor device, in which patterns are formed in a layer of sillicon nitride by means of ion implantation
EP84200471A EP0122662B1 (en) 1983-04-11 1984-04-04 Method of manufacturing a semiconductor device, in which patterns are formed in a layer of sillicon nitride by means of ion implantation
JP59071024A JPS59198723A (ja) 1983-04-11 1984-04-11 半導体装置の製造方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NL8301262A NL8301262A (nl) 1983-04-11 1983-04-11 Werkwijze voor het vervaardigen van een halfgeleiderinrichting, waarbij met behulp van ionenimplantatie patronen worden aangebracht in een laag siliciumnitride.
NL8301262 1983-04-11

Publications (1)

Publication Number Publication Date
NL8301262A true NL8301262A (nl) 1984-11-01

Family

ID=19841683

Family Applications (1)

Application Number Title Priority Date Filing Date
NL8301262A NL8301262A (nl) 1983-04-11 1983-04-11 Werkwijze voor het vervaardigen van een halfgeleiderinrichting, waarbij met behulp van ionenimplantatie patronen worden aangebracht in een laag siliciumnitride.

Country Status (5)

Country Link
US (1) US4514251A (enrdf_load_stackoverflow)
EP (1) EP0122662B1 (enrdf_load_stackoverflow)
JP (1) JPS59198723A (enrdf_load_stackoverflow)
DE (1) DE3466133D1 (enrdf_load_stackoverflow)
NL (1) NL8301262A (enrdf_load_stackoverflow)

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4717449A (en) * 1984-04-25 1988-01-05 Honeywell Inc. Dielectric barrier material
NL8402859A (nl) * 1984-09-18 1986-04-16 Philips Nv Werkwijze voor het vervaardigen van submicrongroeven in bijvoorbeeld halfgeleidermateriaal en met deze werkwijze verkregen inrichtingen.
FR2573919B1 (fr) * 1984-11-06 1987-07-17 Thomson Csf Procede de fabrication de grilles pour circuit integre
US4653173A (en) * 1985-03-04 1987-03-31 Signetics Corporation Method of manufacturing an insulated gate field effect device
GB2172427A (en) * 1985-03-13 1986-09-17 Philips Electronic Associated Semiconductor device manufacture using a deflected ion beam
EP0218039B1 (de) * 1985-09-30 1990-11-07 Siemens Aktiengesellschaft Verfahren zur Übertragung feinster Fotolackstrukturen
US4774197A (en) * 1986-06-17 1988-09-27 Advanced Micro Devices, Inc. Method of improving silicon dioxide
US4772539A (en) * 1987-03-23 1988-09-20 International Business Machines Corporation High resolution E-beam lithographic technique
US5186788A (en) * 1987-07-23 1993-02-16 Matsushita Electric Industrial Co., Ltd. Fine pattern forming method
US4978418A (en) * 1988-08-18 1990-12-18 The United States Of America As Represented By The United States Department Of Energy Controlled ion implant damage profile for etching
US4956314A (en) * 1989-05-30 1990-09-11 Motorola, Inc. Differential etching of silicon nitride
US5092957A (en) * 1989-11-24 1992-03-03 The United States Of America As Represented By The United States Department Of Energy Carrier-lifetime-controlled selective etching process for semiconductors using photochemical etching
US5236547A (en) * 1990-09-25 1993-08-17 Kabushiki Kaisha Toshiba Method of forming a pattern in semiconductor device manufacturing process
US5240875A (en) * 1992-08-12 1993-08-31 North American Philips Corporation Selective oxidation of silicon trench sidewall
KR0142150B1 (ko) * 1993-04-09 1998-07-15 윌리엄 티. 엘리스 붕소 질화물을 에칭하기 위한 방법
US5413953A (en) * 1994-09-30 1995-05-09 United Microelectronics Corporation Method for planarizing an insulator on a semiconductor substrate using ion implantation
US6309975B1 (en) 1997-03-14 2001-10-30 Micron Technology, Inc. Methods of making implanted structures
US5994210A (en) * 1997-08-12 1999-11-30 National Semiconductor Corporation Method of improving silicide sheet resistance by implanting fluorine
US5940735A (en) * 1997-08-25 1999-08-17 Advanced Micro Devices, Inc. Reduction of charge loss in nonvolatile memory cells by phosphorus implantation into PECVD nitride/oxynitride films
JP2000040691A (ja) * 1998-07-21 2000-02-08 Oki Electric Ind Co Ltd 半導体装置製造方法
DE10103524A1 (de) * 2001-01-26 2002-08-22 Infineon Technologies Ag Verfahren und Halbleiteranordnung zur Ätzung einer Schicht eines Halbleitersubstrats mittels einer siliziumhaltigen Ätzmaske
US6806197B2 (en) * 2001-08-07 2004-10-19 Micron Technology, Inc. Method of forming integrated circuitry, and method of forming a contact opening
JP2004192935A (ja) * 2002-12-11 2004-07-08 Hitachi Displays Ltd 有機ｅｌ表示装置
US7737049B2 (en) * 2007-07-31 2010-06-15 Qimonda Ag Method for forming a structure on a substrate and device
KR20100035777A (ko) * 2008-09-29 2010-04-07 삼성전자주식회사 반도체 소자 및 그 제조 방법
US8889562B2 (en) 2012-07-23 2014-11-18 International Business Machines Corporation Double patterning method
JP6032415B2 (ja) * 2012-11-20 2016-11-30 富士通セミコンダクター株式会社 半導体装置の製造方法
US9054041B2 (en) * 2013-07-18 2015-06-09 GlobalFoundries, Inc. Methods for etching dielectric materials in the fabrication of integrated circuits
CN105097537B (zh) * 2014-05-12 2019-09-27 中芯国际集成电路制造(上海)有限公司 鳍式场效应管的形成方法
US9881834B1 (en) 2016-11-29 2018-01-30 Taiwan Semiconductor Manufacturing Company, Ltd. Contact openings and methods forming same

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52128066A (en) * 1976-04-20 1977-10-27 Matsushita Electronics Corp Manufacture of semiconductor device
DE2748401A1 (de) * 1977-10-28 1979-05-03 Licentia Gmbh Halbleiteranordnung

Also Published As

Publication number Publication date
EP0122662B1 (en) 1987-09-09
EP0122662A1 (en) 1984-10-24
US4514251A (en) 1985-04-30
DE3466133D1 (en) 1987-10-15
JPS59198723A (ja) 1984-11-10
JPH0412615B2 (enrdf_load_stackoverflow) 1992-03-05

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A1B A search report has been drawn up
A85 Still pending on 85-01-01
BV The patent application has lapsed