NL8020509A - - Google Patents
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- Publication number
- NL8020509A NL8020509A NL8020509A NL8020509A NL8020509A NL 8020509 A NL8020509 A NL 8020509A NL 8020509 A NL8020509 A NL 8020509A NL 8020509 A NL8020509 A NL 8020509A NL 8020509 A NL8020509 A NL 8020509A
- Authority
- NL
- Netherlands
- Prior art keywords
- memory cell
- node
- clock pulse
- line
- voltage
- Prior art date
Links
- 230000015654 memory Effects 0.000 claims description 100
- 239000003990 capacitor Substances 0.000 claims description 25
- 230000008878 coupling Effects 0.000 claims description 4
- 238000010168 coupling process Methods 0.000 claims description 4
- 238000005859 coupling reaction Methods 0.000 claims description 4
- 230000000694 effects Effects 0.000 claims 1
- 210000004027 cell Anatomy 0.000 description 93
- 230000003068 static effect Effects 0.000 description 15
- 239000004065 semiconductor Substances 0.000 description 9
- 238000000034 method Methods 0.000 description 5
- 239000002245 particle Substances 0.000 description 5
- 230000005669 field effect Effects 0.000 description 4
- 238000012856 packing Methods 0.000 description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 4
- 229920005591 polysilicon Polymers 0.000 description 4
- 238000001514 detection method Methods 0.000 description 3
- 230000036039 immunity Effects 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 210000003850 cellular structure Anatomy 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 230000001066 destructive effect Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000000630 rising effect Effects 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000001934 delay Effects 0.000 description 1
- 238000007667 floating Methods 0.000 description 1
- 210000000987 immune system Anatomy 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000006386 memory function Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 230000008520 organization Effects 0.000 description 1
- 108090000623 proteins and genes Proteins 0.000 description 1
- 238000005086 pumping Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 210000000352 storage cell Anatomy 0.000 description 1
- 239000013589 supplement Substances 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/402—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration individual to each memory cell, i.e. internal refresh
- G11C11/4023—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration individual to each memory cell, i.e. internal refresh using field effect transistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/356017—Bistable circuits using additional transistors in the input circuit
- H03K3/356052—Bistable circuits using additional transistors in the input circuit using pass gates
- H03K3/35606—Bistable circuits using additional transistors in the input circuit using pass gates with synchronous operation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/356086—Bistable circuits with additional means for controlling the main nodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US06/117,223 US4308594A (en) | 1980-01-31 | 1980-01-31 | MOS Memory cell |
| US11722380 | 1980-01-31 | ||
| US8000509 | 1980-05-05 | ||
| PCT/US1980/000509 WO1981002217A1 (en) | 1980-01-31 | 1980-05-05 | Mos memory cell |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| NL8020509A true NL8020509A (enExample) | 1981-12-01 |
Family
ID=22371629
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| NL8020509A NL8020509A (enExample) | 1980-01-31 | 1980-05-05 |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US4308594A (enExample) |
| JP (1) | JPS5914830B2 (enExample) |
| CA (1) | CA1170363A (enExample) |
| DE (1) | DE3050249C2 (enExample) |
| FR (1) | FR2475266B1 (enExample) |
| GB (1) | GB2078460B (enExample) |
| NL (1) | NL8020509A (enExample) |
| WO (1) | WO1981002217A1 (enExample) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0713872B2 (ja) * | 1987-11-24 | 1995-02-15 | 三菱電機株式会社 | 半導体記憶装置 |
| JPH0668675A (ja) * | 1992-08-21 | 1994-03-11 | Takayama:Kk | メモリデバイス |
| JPH09162304A (ja) * | 1995-12-12 | 1997-06-20 | Mitsubishi Electric Corp | 半導体記憶装置 |
| US6078513A (en) * | 1999-06-09 | 2000-06-20 | Neomagic Corp. | NMOS dynamic content-addressable-memory CAM cell with self-booting pass transistors and local row and column select |
| ITMI20021486A1 (it) * | 2002-07-05 | 2004-01-05 | St Microelectronics Srl | Dispositivo elevatore di tensione e sistema di memoria |
| US7027326B2 (en) * | 2004-01-05 | 2006-04-11 | International Business Machines Corporation | 3T1D memory cells using gated diodes and methods of use thereof |
| US8324667B2 (en) | 2004-01-05 | 2012-12-04 | International Business Machines Corporation | Amplifiers using gated diodes |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3618053A (en) * | 1969-12-31 | 1971-11-02 | Westinghouse Electric Corp | Trapped charge memory cell |
| US3744037A (en) * | 1971-10-04 | 1973-07-03 | North American Rockwell | Two-clock memory cell |
| US3878404A (en) * | 1972-10-30 | 1975-04-15 | Electronic Arrays | Integrated circuit of the MOS variety |
| US3876993A (en) * | 1974-03-25 | 1975-04-08 | Texas Instruments Inc | Random access memory cell |
| US3967252A (en) * | 1974-10-03 | 1976-06-29 | Mostek Corporation | Sense AMP for random access memory |
| US4091460A (en) * | 1976-10-05 | 1978-05-23 | The United States Of America As Represented By The Secretary Of The Air Force | Quasi static, virtually nonvolatile random access memory cell |
| US4125854A (en) * | 1976-12-02 | 1978-11-14 | Mostek Corporation | Symmetrical cell layout for static RAM |
-
1980
- 1980-01-31 US US06/117,223 patent/US4308594A/en not_active Expired - Lifetime
- 1980-05-05 WO PCT/US1980/000509 patent/WO1981002217A1/en not_active Ceased
- 1980-05-05 NL NL8020509A patent/NL8020509A/nl unknown
- 1980-05-05 DE DE3050249T patent/DE3050249C2/de not_active Expired
- 1980-05-05 GB GB8127121A patent/GB2078460B/en not_active Expired
- 1980-05-05 JP JP56500724A patent/JPS5914830B2/ja not_active Expired
-
1981
- 1981-01-30 CA CA000369695A patent/CA1170363A/en not_active Expired
- 1981-02-02 FR FR8101941A patent/FR2475266B1/fr not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5914830B2 (ja) | 1984-04-06 |
| FR2475266B1 (enExample) | 1985-01-18 |
| JPS57500038A (enExample) | 1982-01-07 |
| DE3050249T1 (de) | 1982-04-22 |
| US4308594A (en) | 1981-12-29 |
| FR2475266A1 (enExample) | 1981-08-07 |
| GB2078460B (en) | 1982-12-08 |
| WO1981002217A1 (en) | 1981-08-06 |
| DE3050249C2 (de) | 1986-05-15 |
| CA1170363A (en) | 1984-07-03 |
| GB2078460A (en) | 1982-01-06 |
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