NL7810293A - Geheugenschakeling. - Google Patents

Geheugenschakeling.

Info

Publication number
NL7810293A
NL7810293A NL7810293A NL7810293A NL7810293A NL 7810293 A NL7810293 A NL 7810293A NL 7810293 A NL7810293 A NL 7810293A NL 7810293 A NL7810293 A NL 7810293A NL 7810293 A NL7810293 A NL 7810293A
Authority
NL
Netherlands
Prior art keywords
memory switch
switch
memory
Prior art date
Application number
NL7810293A
Other languages
English (en)
Dutch (nl)
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of NL7810293A publication Critical patent/NL7810293A/xx

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
NL7810293A 1977-10-18 1978-10-13 Geheugenschakeling. NL7810293A (nl)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12470477A JPS5457921A (en) 1977-10-18 1977-10-18 Sense amplifier circuit

Publications (1)

Publication Number Publication Date
NL7810293A true NL7810293A (nl) 1979-04-20

Family

ID=14892023

Family Applications (1)

Application Number Title Priority Date Filing Date
NL7810293A NL7810293A (nl) 1977-10-18 1978-10-13 Geheugenschakeling.

Country Status (5)

Country Link
US (1) US4262341A (ja)
JP (1) JPS5457921A (ja)
DE (1) DE2845100C3 (ja)
GB (1) GB2006562B (ja)
NL (1) NL7810293A (ja)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5823388A (ja) * 1981-08-05 1983-02-12 Nec Corp メモリ装置
US4493056A (en) * 1982-06-30 1985-01-08 International Business Machines Corporation RAM Utilizing offset contact regions for increased storage capacitance
JPS59172761A (ja) * 1983-03-23 1984-09-29 Hitachi Ltd 半導体装置
US4725986A (en) * 1983-09-20 1988-02-16 International Business Machines Corporation FET read only memory cell with word line augmented precharging of the bit lines
DE151898T1 (de) * 1984-01-05 1985-11-21 Mostek Corp., Carrollton, Tex. Verfahren und anordnung zur ausgleichung einer speicherzelle.
JPS60191499A (ja) * 1984-03-09 1985-09-28 Toshiba Corp ダイナミツク型ランダムアクセスメモリ
JPS6150284A (ja) * 1984-08-17 1986-03-12 Mitsubishi Electric Corp シエアドセンスアンプ回路の駆動方法
JPH0234178Y2 (ja) * 1984-12-11 1990-09-13
JPS6410493A (en) * 1987-07-02 1989-01-13 Mitsubishi Electric Corp Charge transfer type sense amplifier
US4816706A (en) * 1987-09-10 1989-03-28 International Business Machines Corporation Sense amplifier with improved bitline precharging for dynamic random access memory
JPH052417Y2 (ja) * 1987-10-27 1993-01-21
US5148399A (en) * 1988-06-28 1992-09-15 Oki Electric Industry Co., Ltd. Sense amplifier circuitry selectively separable from bit lines for dynamic random access memory
JPH0442493A (ja) * 1990-06-07 1992-02-13 Fujitsu Ltd 半導体記憶装置
KR100256120B1 (ko) * 1993-09-22 2000-05-15 김영환 고속 감지 증폭기
US5982202A (en) * 1998-05-13 1999-11-09 Dallas Semiconductor Corporation Method and apparatus for pre-biasing inputs to a latching portion of a sensing amplifier

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3760381A (en) * 1972-06-30 1973-09-18 Ibm Stored charge memory detection circuit
JPS5080736A (ja) * 1973-11-14 1975-07-01
US4010453A (en) * 1975-12-03 1977-03-01 International Business Machines Corporation Stored charge differential sense amplifier
US4061999A (en) * 1975-12-29 1977-12-06 Mostek Corporation Dynamic random access memory system
SU928405A1 (ru) * 1976-08-05 1982-05-15 Предприятие П/Я Р-6429 Усилитель считывани дл интегрального запоминающего устройства
JPS6034191B2 (ja) * 1977-03-04 1985-08-07 日本電気株式会社 記憶回路
JPS5935114B2 (ja) * 1977-03-17 1984-08-27 日本電気株式会社 増巾回路

Also Published As

Publication number Publication date
GB2006562B (en) 1982-05-26
US4262341A (en) 1981-04-14
DE2845100B2 (ja) 1980-01-31
JPS5457921A (en) 1979-05-10
JPS6145316B2 (ja) 1986-10-07
DE2845100A1 (de) 1979-04-19
GB2006562A (en) 1979-05-02
DE2845100C3 (de) 1982-07-15

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Legal Events

Date Code Title Description
A1A A request for search or an international-type search has been filed
BB A search report has been drawn up
BC A request for examination has been filed
A85 Still pending on 85-01-01
BV The patent application has lapsed