NL7607285A - Werkwijze voor het vervaardigen van een bipo- laire geintegreerde schakeling, en volgens deze werkwijze vervaardigde, bipolaire gein- tegreerde schakeling. - Google Patents

Werkwijze voor het vervaardigen van een bipo- laire geintegreerde schakeling, en volgens deze werkwijze vervaardigde, bipolaire gein- tegreerde schakeling.

Info

Publication number
NL7607285A
NL7607285A NL7607285A NL7607285A NL7607285A NL 7607285 A NL7607285 A NL 7607285A NL 7607285 A NL7607285 A NL 7607285A NL 7607285 A NL7607285 A NL 7607285A NL 7607285 A NL7607285 A NL 7607285A
Authority
NL
Netherlands
Prior art keywords
integrated circuit
bipolar integrated
procedure
manufacture
manufactured according
Prior art date
Application number
NL7607285A
Other languages
English (en)
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of NL7607285A publication Critical patent/NL7607285A/nl

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73—Bipolar junction transistors
    • H01L29/735—Lateral transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/266—Bombardment with radiation with high-energy radiation producing ion implantation using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8222—Bipolar technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/977—Thinning or removal of substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Ceramic Engineering (AREA)
  • Bipolar Transistors (AREA)
  • Element Separation (AREA)
NL7607285A 1975-07-02 1976-07-01 Werkwijze voor het vervaardigen van een bipo- laire geintegreerde schakeling, en volgens deze werkwijze vervaardigde, bipolaire gein- tegreerde schakeling. NL7607285A (nl)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2529598A DE2529598C3 (de) 1975-07-02 1975-07-02 Verfahren zur Herstellung einer monolithisch integrierten Halbleiterschaltung mit bipolaren Transistoren

Publications (1)

Publication Number Publication Date
NL7607285A true NL7607285A (nl) 1977-01-04

Family

ID=5950525

Family Applications (1)

Application Number Title Priority Date Filing Date
NL7607285A NL7607285A (nl) 1975-07-02 1976-07-01 Werkwijze voor het vervaardigen van een bipo- laire geintegreerde schakeling, en volgens deze werkwijze vervaardigde, bipolaire gein- tegreerde schakeling.

Country Status (8)

Country Link
US (1) US4047975A (nl)
JP (1) JPS528784A (nl)
BE (1) BE843622A (nl)
DE (1) DE2529598C3 (nl)
FR (1) FR2316729A1 (nl)
GB (1) GB1510276A (nl)
IT (1) IT1081215B (nl)
NL (1) NL7607285A (nl)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111926389A (zh) * 2020-08-05 2020-11-13 吉林大学 利用分子共混生长的双极性有机单晶、制备方法及其应用

Families Citing this family (22)

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Publication number Priority date Publication date Assignee Title
US4168213A (en) * 1976-04-29 1979-09-18 U.S. Philips Corporation Field emission device and method of forming same
CA1090006A (en) * 1976-12-27 1980-11-18 Wolfgang M. Feist Semiconductor structures and methods for manufacturing such structures
US4111720A (en) * 1977-03-31 1978-09-05 International Business Machines Corporation Method for forming a non-epitaxial bipolar integrated circuit
US4144098A (en) * 1977-04-28 1979-03-13 Hughes Aircraft Company P+ Buried layer for I2 L isolation by ion implantation
US4099987A (en) * 1977-07-25 1978-07-11 International Business Machines Corporation Fabricating integrated circuits incorporating high-performance bipolar transistors
US4116720A (en) * 1977-12-27 1978-09-26 Burroughs Corporation Method of making a V-MOS field effect transistor for a dynamic memory cell having improved capacitance
US4330932A (en) * 1978-07-20 1982-05-25 The United States Of America As Represented By The Secretary Of The Navy Process for preparing isolated junctions in thin-film semiconductors utilizing shadow masked deposition to form graded-side mesas
US4206005A (en) * 1978-11-27 1980-06-03 Xerox Corporation Method of making split gate LSI VMOSFET
US4326332A (en) * 1980-07-28 1982-04-27 International Business Machines Corp. Method of making a high density V-MOS memory array
US4415371A (en) * 1980-12-29 1983-11-15 Rockwell International Corporation Method of making sub-micron dimensioned NPN lateral transistor
US4485551A (en) * 1981-03-02 1984-12-04 Rockwell International Corporation NPN Type lateral transistor separated from substrate by O.D.E. for minimal interference therefrom and method for producing same
US4743565A (en) * 1981-03-30 1988-05-10 International Business Machines Corporation Lateral device structures using self-aligned fabrication techniques
US4688073A (en) * 1981-03-30 1987-08-18 Goth George R Lateral device structures using self-aligned fabrication techniques
US4397079A (en) * 1981-03-30 1983-08-09 International Business Machines Corp. Process for improving the yield of integrated devices including Schottky barrier diodes
US4508579A (en) * 1981-03-30 1985-04-02 International Business Machines Corporation Lateral device structures using self-aligned fabrication techniques
JPH0669101B2 (ja) * 1983-08-25 1994-08-31 松下電子工業株式会社 半導体装置の製造方法
US5289024A (en) * 1990-08-07 1994-02-22 National Semiconductor Corporation Bipolar transistor with diffusion compensation
US5998266A (en) * 1996-12-19 1999-12-07 Magepower Semiconductor Corp. Method of forming a semiconductor structure having laterally merged body layer
US7199055B2 (en) * 2003-03-03 2007-04-03 Cypress Semiconductor Corp. Magnetic memory cell junction and method for forming a magnetic memory cell junction
KR100604527B1 (ko) * 2003-12-31 2006-07-24 동부일렉트로닉스 주식회사 바이폴라 트랜지스터 제조방법
JP4906267B2 (ja) * 2005-03-31 2012-03-28 オンセミコンダクター・トレーディング・リミテッド 半導体装置及びその製造方法
US7687887B1 (en) * 2006-12-01 2010-03-30 National Semiconductor Corporation Method of forming a self-aligned bipolar transistor structure using a selectively grown emitter

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3472751A (en) * 1965-06-16 1969-10-14 Ion Physics Corp Method and apparatus for forming deposits on a substrate by cathode sputtering using a focussed ion beam
GB1332931A (en) * 1970-01-15 1973-10-10 Mullard Ltd Methods of manufacturing a semiconductor device
US3657542A (en) * 1970-05-04 1972-04-18 Atomic Energy Commission Production of beams of excited energetic neutral particles
US3675313A (en) * 1970-10-01 1972-07-11 Westinghouse Electric Corp Process for producing self aligned gate field effect transistor
US3823352A (en) * 1972-12-13 1974-07-09 Bell Telephone Labor Inc Field effect transistor structures and methods
US3950233A (en) * 1973-07-30 1976-04-13 Signetics Corporation Method for fabricating a semiconductor structure
US3884788A (en) * 1973-08-30 1975-05-20 Honeywell Inc Substrate preparation for liquid phase epitaxy of mercury cadmium telluride
GB1444173A (en) * 1973-09-07 1976-07-28 Flour Milling Baking Research Treatment of grain
US3920482A (en) * 1974-03-13 1975-11-18 Signetics Corp Method for forming a semiconductor structure having islands isolated by adjacent moats
US3966514A (en) * 1975-06-30 1976-06-29 Ibm Corporation Method for forming dielectric isolation combining dielectric deposition and thermal oxidation

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111926389A (zh) * 2020-08-05 2020-11-13 吉林大学 利用分子共混生长的双极性有机单晶、制备方法及其应用

Also Published As

Publication number Publication date
GB1510276A (en) 1978-05-10
DE2529598A1 (de) 1977-01-13
FR2316729A1 (fr) 1977-01-28
JPS528784A (en) 1977-01-22
US4047975A (en) 1977-09-13
DE2529598B2 (de) 1977-09-29
FR2316729B1 (nl) 1979-09-28
BE843622A (fr) 1976-10-18
IT1081215B (it) 1985-05-16
DE2529598C3 (de) 1978-05-24

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