NL7604652A - Werkwijze voor de vervaardiging van halfgelei- ders. - Google Patents
Werkwijze voor de vervaardiging van halfgelei- ders.Info
- Publication number
- NL7604652A NL7604652A NL7604652A NL7604652A NL7604652A NL 7604652 A NL7604652 A NL 7604652A NL 7604652 A NL7604652 A NL 7604652A NL 7604652 A NL7604652 A NL 7604652A NL 7604652 A NL7604652 A NL 7604652A
- Authority
- NL
- Netherlands
- Prior art keywords
- semiconductors
- manufacture
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76804—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics by forming tapered via holes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0313—Organic insulating material
- H05K1/032—Organic insulating material consisting of one material
- H05K1/0346—Organic insulating material consisting of one material containing N
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0017—Etching of the substrate by chemical or physical means
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Formation Of Insulating Films (AREA)
- Weting (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Treatments Of Macromolecular Shaped Articles (AREA)
- Macromolecular Compounds Obtained By Forming Nitrogen-Containing Linkages In General (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP50098179A JPS5222071A (en) | 1975-08-13 | 1975-08-13 | Method of selective etching of film of polyamide resin |
Publications (1)
Publication Number | Publication Date |
---|---|
NL7604652A true NL7604652A (nl) | 1977-02-15 |
Family
ID=14212791
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
NL7604652A NL7604652A (nl) | 1975-08-13 | 1976-04-29 | Werkwijze voor de vervaardiging van halfgelei- ders. |
Country Status (5)
Country | Link |
---|---|
JP (1) | JPS5222071A (nl) |
DE (1) | DE2618937C3 (nl) |
FR (1) | FR2321190A1 (nl) |
GB (1) | GB1510944A (nl) |
NL (1) | NL7604652A (nl) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54106599A (en) * | 1978-02-09 | 1979-08-21 | Hitachi Chem Co Ltd | Preparation of polyamide intermediate for semiconductor processing |
JPS54179102U (nl) * | 1978-06-07 | 1979-12-18 | ||
JPS5515502A (en) * | 1978-07-18 | 1980-02-02 | Hitachi Ltd | Running control system for manless wagon |
JPS557880A (en) * | 1979-04-27 | 1980-01-21 | Hitachi Ltd | Etching solution for organic resin |
JPS58108229A (ja) * | 1981-12-21 | 1983-06-28 | Hitachi Ltd | ポリイミド系樹脂膜の選択エツチング方法 |
FR2525389A1 (fr) * | 1982-04-14 | 1983-10-21 | Commissariat Energie Atomique | Procede de positionnement d'une ligne d'interconnexion sur un trou de contact electrique d'un circuit integre |
FR2550660B2 (fr) * | 1982-04-14 | 1987-11-06 | Commissariat Energie Atomique | Perfectionnement au procede de positionnement d'une ligne d'interconnexion sur un trou de contact electrique d'un circuit integre |
FR2537779B1 (fr) * | 1982-12-10 | 1986-03-14 | Commissariat Energie Atomique | Procede de positionnement d'un trou de contact electrique entre deux lignes d'interconnexion d'un circuit integre |
DE3475856D1 (en) * | 1983-08-12 | 1989-02-02 | Commissariat Energie Atomique | Method for aligning a connecting line above an electrical contact hole of an integrated circuit |
EP0511691A3 (en) * | 1988-07-13 | 1993-03-03 | International Business Machines Corporation | Wet etching of cured polyimide |
US6303230B1 (en) | 1995-01-17 | 2001-10-16 | Nippon Steel Chemical Co., Ltd. | Laminates |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS49120504A (nl) * | 1973-03-16 | 1974-11-18 |
-
1975
- 1975-08-13 JP JP50098179A patent/JPS5222071A/ja active Granted
-
1976
- 1976-04-29 NL NL7604652A patent/NL7604652A/nl not_active Application Discontinuation
- 1976-04-29 DE DE2618937A patent/DE2618937C3/de not_active Expired
- 1976-04-30 GB GB17720/76A patent/GB1510944A/en not_active Expired
- 1976-05-05 FR FR7613338A patent/FR2321190A1/fr active Granted
Also Published As
Publication number | Publication date |
---|---|
DE2618937A1 (de) | 1977-02-17 |
FR2321190B1 (nl) | 1979-08-17 |
GB1510944A (en) | 1978-05-17 |
FR2321190A1 (fr) | 1977-03-11 |
DE2618937C3 (de) | 1979-02-22 |
JPS5328342B2 (nl) | 1978-08-14 |
JPS5222071A (en) | 1977-02-19 |
DE2618937B2 (de) | 1978-06-29 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
BC | A request for examination has been filed | ||
A85 | Still pending on 85-01-01 | ||
BV | The patent application has lapsed |