NL7604237A - Halfgeleiderinrichting. - Google Patents

Halfgeleiderinrichting.

Info

Publication number
NL7604237A
NL7604237A NL7604237A NL7604237A NL7604237A NL 7604237 A NL7604237 A NL 7604237A NL 7604237 A NL7604237 A NL 7604237A NL 7604237 A NL7604237 A NL 7604237A NL 7604237 A NL7604237 A NL 7604237A
Authority
NL
Netherlands
Prior art keywords
semi
guide device
guide
Prior art date
Application number
NL7604237A
Other languages
English (en)
Dutch (nl)
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of NL7604237A publication Critical patent/NL7604237A/xx

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • H01L21/316Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/3165Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation
    • H01L21/31654Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • H01L21/318Inorganic layers composed of nitrides
    • H01L21/3185Inorganic layers composed of nitrides of siliconnitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/291Oxides or nitrides or carbides, e.g. ceramics, glass
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157Partial encapsulation or coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/8605Resistors with PN junctions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/061Gettering-armorphous layers
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/085Isolated-integrated
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/112Nitridation, direct, of silicon
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/114Nitrides of silicon
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/958Passivation layer
NL7604237A 1975-04-21 1976-04-21 Halfgeleiderinrichting. NL7604237A (nl)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50048378A JPS6041458B2 (ja) 1975-04-21 1975-04-21 半導体装置の製造方法

Publications (1)

Publication Number Publication Date
NL7604237A true NL7604237A (nl) 1976-10-25

Family

ID=12801650

Family Applications (1)

Application Number Title Priority Date Filing Date
NL7604237A NL7604237A (nl) 1975-04-21 1976-04-21 Halfgeleiderinrichting.

Country Status (7)

Country Link
US (1) US4084986A (ja)
JP (1) JPS6041458B2 (ja)
CA (1) CA1071772A (ja)
DE (1) DE2617397A1 (ja)
FR (1) FR2309036A1 (ja)
GB (1) GB1536719A (ja)
NL (1) NL7604237A (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2371779A1 (fr) * 1976-11-19 1978-06-16 Philips Nv Dispositif semi-conducteur a faible capacite parasite et son procede de fabrication
US4105805A (en) * 1976-12-29 1978-08-08 The United States Of America As Represented By The Secretary Of The Army Formation of metal nitride oxide semiconductor (MNOS) by ion implantation of oxygen through a silicon nitride layer

Families Citing this family (41)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IN147578B (ja) * 1977-02-24 1980-04-19 Rca Corp
DE2730367A1 (de) * 1977-07-05 1979-01-18 Siemens Ag Verfahren zum passivieren von halbleiterelementen
JPS5841659B2 (ja) * 1977-08-30 1983-09-13 株式会社東芝 絶縁膜の形成方法
JPS5721856B2 (en) * 1977-11-28 1982-05-10 Nippon Telegraph & Telephone Semiconductor and its manufacture
US4742384A (en) * 1978-02-01 1988-05-03 Rca Corporation Structure for passivating a PN junction
US4473597A (en) * 1978-02-01 1984-09-25 Rca Corporation Method and structure for passivating a PN junction
JPS5939906B2 (ja) * 1978-05-04 1984-09-27 超エル・エス・アイ技術研究組合 半導体装置の製造方法
DE2836911C2 (de) * 1978-08-23 1986-11-06 Siemens AG, 1000 Berlin und 8000 München Passivierungsschicht für Halbleiterbauelemente
US4242697A (en) * 1979-03-14 1980-12-30 Bell Telephone Laboratories, Incorporated Dielectrically isolated high voltage semiconductor devices
FR2459551A1 (fr) * 1979-06-19 1981-01-09 Thomson Csf Procede et structure de passivation a autoalignement sur l'emplacement d'un masque
JPS5640269A (en) * 1979-09-11 1981-04-16 Toshiba Corp Preparation of semiconductor device
JPS5679449A (en) * 1979-11-30 1981-06-30 Mitsubishi Electric Corp Production of semiconductor device
US4315782A (en) * 1980-07-21 1982-02-16 Rca Corporation Method of making semiconductor device with passivated rectifying junctions having hydrogenated amorphous regions
US4803528A (en) * 1980-07-28 1989-02-07 General Electric Company Insulating film having electrically conducting portions
US4339285A (en) * 1980-07-28 1982-07-13 Rca Corporation Method for fabricating adjacent conducting and insulating regions in a film by laser irradiation
US4430404A (en) 1981-04-30 1984-02-07 Hitachi, Ltd. Electrophotographic photosensitive material having thin amorphous silicon protective layer
US4420765A (en) * 1981-05-29 1983-12-13 Rca Corporation Multi-layer passivant system
US4417385A (en) * 1982-08-09 1983-11-29 General Electric Company Processes for manufacturing insulated-gate semiconductor devices with integral shorts
US4466176A (en) * 1982-08-09 1984-08-21 General Electric Company Process for manufacturing insulated-gate semiconductor devices with integral shorts
JPS6068621A (ja) * 1983-09-26 1985-04-19 Toshiba Corp 半導体装置の製造方法
JPS6242829U (ja) * 1985-08-30 1987-03-14
US4814285A (en) * 1985-09-23 1989-03-21 Harris Corp. Method for forming planarized interconnect level using selective deposition and ion implantation
JPS6276673A (ja) * 1985-09-30 1987-04-08 Toshiba Corp 高耐圧半導体装置
GB2183905B (en) * 1985-11-18 1989-10-04 Plessey Co Plc Method of semiconductor device manufacture
DE3542166A1 (de) * 1985-11-29 1987-06-04 Telefunken Electronic Gmbh Halbleiterbauelement
US4705760A (en) * 1986-01-16 1987-11-10 Rca Corporation Preparation of a surface for deposition of a passinating layer
US4740481A (en) * 1986-01-21 1988-04-26 Motorola Inc. Method of preventing hillock formation in polysilicon layer by oxygen implanation
US4682407A (en) * 1986-01-21 1987-07-28 Motorola, Inc. Means and method for stabilizing polycrystalline semiconductor layers
KR900005038B1 (ko) * 1987-07-31 1990-07-18 삼성전자 주식회사 고저항 다결정 실리콘의 제조방법
US4993427A (en) * 1989-11-09 1991-02-19 Sonotek Corporation Heart contraction monitor
JP2601136B2 (ja) * 1993-05-07 1997-04-16 日本電気株式会社 半導体装置の製造方法
GB2323706B (en) * 1997-03-13 2002-02-13 United Microelectronics Corp Method to inhibit the formation of ion implantation induced edge defects
US5930659A (en) * 1997-12-05 1999-07-27 Advanced Microdevices, Inc. Forming minimal size spaces in integrated circuit conductive lines
US6046109A (en) * 1997-12-29 2000-04-04 Industrial Technology Research Institute Creation of local semi-insulating regions on semiconductor substrates
US6458645B2 (en) * 1998-02-26 2002-10-01 Micron Technology, Inc. Capacitor having tantalum oxynitride film and method for making same
US6995821B1 (en) * 1999-04-23 2006-02-07 International Business Machines Corporation Methods of reducing unbalanced DC voltage between two electrodes of reflective liquid crystal display by thin film passivation
US6635983B1 (en) * 1999-09-02 2003-10-21 Micron Technology, Inc. Nitrogen and phosphorus doped amorphous silicon as resistor for field emission device baseplate
KR100711000B1 (ko) * 2005-11-28 2007-04-24 동부일렉트로닉스 주식회사 이중 게이트를 구비한 모스트랜지스터 및 그 제조방법
JP5195186B2 (ja) * 2008-09-05 2013-05-08 三菱電機株式会社 半導体装置の製造方法
US20150050816A1 (en) * 2013-08-19 2015-02-19 Korea Atomic Energy Research Institute Method of electrochemically preparing silicon film
CN113774494B (zh) * 2021-11-15 2022-03-29 浙江大学杭州国际科创中心 一种半绝缘型碳化硅单晶片剥离方法及剥离装置

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Publication number Priority date Publication date Assignee Title
US3563809A (en) * 1968-08-05 1971-02-16 Hughes Aircraft Co Method of making semiconductor devices with ion beams
JPS4936792B1 (ja) * 1970-10-15 1974-10-03
US3897274A (en) * 1971-06-01 1975-07-29 Texas Instruments Inc Method of fabricating dielectrically isolated semiconductor structures
JPS4939235A (ja) * 1972-08-24 1974-04-12
US3900345A (en) * 1973-08-02 1975-08-19 Motorola Inc Thin low temperature epi regions by conversion of an amorphous layer
JPS532552B2 (ja) * 1974-03-30 1978-01-28

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2371779A1 (fr) * 1976-11-19 1978-06-16 Philips Nv Dispositif semi-conducteur a faible capacite parasite et son procede de fabrication
US4105805A (en) * 1976-12-29 1978-08-08 The United States Of America As Represented By The Secretary Of The Army Formation of metal nitride oxide semiconductor (MNOS) by ion implantation of oxygen through a silicon nitride layer

Also Published As

Publication number Publication date
JPS6041458B2 (ja) 1985-09-17
FR2309036A1 (fr) 1976-11-19
GB1536719A (en) 1978-12-20
FR2309036B1 (ja) 1980-07-25
DE2617397A1 (de) 1976-11-04
US4084986A (en) 1978-04-18
CA1071772A (en) 1980-02-12
JPS51123561A (en) 1976-10-28

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BV The patent application has lapsed