NL7106459A - - Google Patents
Info
- Publication number
- NL7106459A NL7106459A NL7106459A NL7106459A NL7106459A NL 7106459 A NL7106459 A NL 7106459A NL 7106459 A NL7106459 A NL 7106459A NL 7106459 A NL7106459 A NL 7106459A NL 7106459 A NL7106459 A NL 7106459A
- Authority
- NL
- Netherlands
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/401—Package configurations characterised by multiple insulating or insulated package substrates, interposers or RDLs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/60—Strap connectors, e.g. thick copper clips for grounding of power devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/20—Configurations of stacked chips
- H10W90/297—Configurations of stacked chips characterised by the through-semiconductor vias [TSVs] in the stacked chips
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19702022895 DE2022895B2 (de) | 1970-05-11 | 1970-05-11 | Stapelfoermige anordnung von halbleiterkoerpern und verfahren zu deren herstellung |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| NL7106459A true NL7106459A (en:Method) | 1971-11-15 |
Family
ID=5770762
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| NL7106459A NL7106459A (en:Method) | 1970-05-11 | 1971-05-11 |
Country Status (8)
| Country | Link |
|---|---|
| AT (1) | AT322059B (en:Method) |
| CA (1) | CA922818A (en:Method) |
| CH (1) | CH519247A (en:Method) |
| DE (1) | DE2022895B2 (en:Method) |
| FR (1) | FR2088490A1 (en:Method) |
| GB (1) | GB1300881A (en:Method) |
| NL (1) | NL7106459A (en:Method) |
| SE (1) | SE369028B (en:Method) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2806685A1 (de) * | 1978-02-16 | 1979-08-23 | Siemens Ag | Stapelbauweise fuer halbleiter- speicherbausteine |
| JPS5837948A (ja) * | 1981-08-31 | 1983-03-05 | Toshiba Corp | 積層半導体記憶装置 |
| GB2150749B (en) * | 1983-12-03 | 1987-09-23 | Standard Telephones Cables Ltd | Integrated circuits |
| US4982264A (en) * | 1985-02-27 | 1991-01-01 | Texas Instruments Incorporated | High density integrated circuit package |
| DE3640072A1 (de) * | 1986-11-24 | 1988-06-01 | Rolf Tiedeken | Elektronisches datenspeicherorgan, welches eine anzahl von statischen ram-chips aufweist |
| FR2645681B1 (fr) * | 1989-04-07 | 1994-04-08 | Thomson Csf | Dispositif d'interconnexion verticale de pastilles de circuits integres et son procede de fabrication |
| US5059557A (en) * | 1989-08-08 | 1991-10-22 | Texas Instruments Incorporated | Method of electrically connecting integrated circuits by edge-insertion in grooved support members |
| US5696030A (en) * | 1994-09-30 | 1997-12-09 | International Business Machines Corporation | Integrated circuit contacts having improved electromigration characteristics and fabrication methods therefor |
-
1970
- 1970-05-11 DE DE19702022895 patent/DE2022895B2/de active Granted
-
1971
- 1971-04-07 CH CH510271A patent/CH519247A/de not_active IP Right Cessation
- 1971-04-27 AT AT361971A patent/AT322059B/de not_active IP Right Cessation
- 1971-05-10 GB GB03988/71A patent/GB1300881A/en not_active Expired
- 1971-05-11 NL NL7106459A patent/NL7106459A/xx unknown
- 1971-05-11 FR FR7116896A patent/FR2088490A1/fr not_active Withdrawn
- 1971-05-11 SE SE06116/71A patent/SE369028B/xx unknown
- 1971-05-11 CA CA112685A patent/CA922818A/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| FR2088490A1 (en:Method) | 1972-01-07 |
| DE2022895A1 (de) | 1971-12-30 |
| SE369028B (en:Method) | 1974-07-29 |
| GB1300881A (en) | 1972-12-20 |
| DE2022895B2 (de) | 1976-12-02 |
| CA922818A (en) | 1973-03-13 |
| CH519247A (de) | 1972-02-15 |
| AT322059B (de) | 1975-05-12 |