NL194183C - EPROM-cel met gleuf-isolatie, en werkwijze voor het vervaardigen hiervan. - Google Patents

EPROM-cel met gleuf-isolatie, en werkwijze voor het vervaardigen hiervan. Download PDF

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Publication number
NL194183C
NL194183C NL8901545A NL8901545A NL194183C NL 194183 C NL194183 C NL 194183C NL 8901545 A NL8901545 A NL 8901545A NL 8901545 A NL8901545 A NL 8901545A NL 194183 C NL194183 C NL 194183C
Authority
NL
Netherlands
Prior art keywords
layer
cell
poly
oxide
gate
Prior art date
Application number
NL8901545A
Other languages
English (en)
Dutch (nl)
Other versions
NL8901545A (nl
NL194183B (nl
Original Assignee
Goldstar Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Goldstar Electron Ltd filed Critical Goldstar Electron Ltd
Publication of NL8901545A publication Critical patent/NL8901545A/nl
Publication of NL194183B publication Critical patent/NL194183B/xx
Application granted granted Critical
Publication of NL194183C publication Critical patent/NL194183C/nl

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66825Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a floating gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0642Isolation within the component, i.e. internal isolation
    • H01L29/0649Dielectric regions, e.g. SiO2 regions, air gaps
    • H01L29/0653Dielectric regions, e.g. SiO2 regions, air gaps adjoining the input or output region of a field-effect device, e.g. the source or drain region
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401Multistep manufacturing processes
    • H01L29/4011Multistep manufacturing processes for data storage electrodes
    • H01L29/40114Multistep manufacturing processes for data storage electrodes the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/788Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881Programmable transistors with only two possible levels of programmation
    • H01L29/7884Programmable transistors with only two possible levels of programmation charging by hot carrier injection
    • H01L29/7886Hot carrier produced by avalanche breakdown of a PN junction, e.g. FAMOS
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B69/00Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Element Separation (AREA)
NL8901545A 1988-06-30 1989-06-20 EPROM-cel met gleuf-isolatie, en werkwijze voor het vervaardigen hiervan. NL194183C (nl)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1019880007986A KR970000652B1 (ko) 1988-06-30 1988-06-30 트랜치 분리를 이용한 eprom 셀 및 이의 제조방법
KR880007986 1988-06-30

Publications (3)

Publication Number Publication Date
NL8901545A NL8901545A (nl) 1990-01-16
NL194183B NL194183B (nl) 2001-04-02
NL194183C true NL194183C (nl) 2001-08-03

Family

ID=19275680

Family Applications (1)

Application Number Title Priority Date Filing Date
NL8901545A NL194183C (nl) 1988-06-30 1989-06-20 EPROM-cel met gleuf-isolatie, en werkwijze voor het vervaardigen hiervan.

Country Status (5)

Country Link
JP (1) JPH02119185A (de)
KR (1) KR970000652B1 (de)
DE (1) DE3920451C2 (de)
FR (1) FR2633777B1 (de)
NL (1) NL194183C (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE68916335T2 (de) * 1988-08-08 1995-01-05 Nat Semiconductor Corp Elektrisch löschbare und programmierbare Nurlese-Bipolar-Feldeffekt-Speicherzelle und Verfahren zu deren Herstellung.
JP3083547B2 (ja) 1990-07-12 2000-09-04 株式会社日立製作所 半導体集積回路装置
DE4200620C2 (de) * 1992-01-13 1994-10-06 Eurosil Electronic Gmbh Floating-Gate-EEPROM-Zelle mit Sandwichkoppelkapaziztät
KR100790044B1 (ko) * 2006-03-09 2008-01-02 엘지전자 주식회사 전기 호브의 냉각장치
KR100701179B1 (ko) * 2006-03-24 2007-03-28 주식회사 대우일렉트로닉스 전자레인지의 컨벡션모터 냉각장치
KR101684116B1 (ko) 2015-05-26 2016-12-08 현대자동차주식회사 차량용 공조 제어 방법

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1985001836A1 (en) * 1983-10-11 1985-04-25 American Telephone & Telegraph Company Semiconductor integrated circuits containing complementary metal oxide semiconductor devices
JPS60260147A (ja) * 1984-06-06 1985-12-23 Fujitsu Ltd 半導体装置
US4698900A (en) * 1986-03-27 1987-10-13 Texas Instruments Incorporated Method of making a non-volatile memory having dielectric filled trenches

Also Published As

Publication number Publication date
DE3920451A1 (de) 1990-01-04
NL8901545A (nl) 1990-01-16
KR970000652B1 (ko) 1997-01-16
KR900001023A (ko) 1990-01-31
DE3920451C2 (de) 1993-12-02
FR2633777A1 (fr) 1990-01-05
NL194183B (nl) 2001-04-02
JPH02119185A (ja) 1990-05-07
FR2633777B1 (fr) 1993-12-31

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Legal Events

Date Code Title Description
A1A A request for search or an international-type search has been filed
BB A search report has been drawn up
CNR Transfer of rights (patent application after its laying open for public inspection)

Free format text: GOLDSTAR ELECTRON LTD.

BC A request for examination has been filed
V4 Discontinued because of reaching the maximum lifetime of a patent

Effective date: 20090620