MY170333A - Device architecture and method for precision enhancement of vertical semiconductor devices - Google Patents
Device architecture and method for precision enhancement of vertical semiconductor devicesInfo
- Publication number
- MY170333A MY170333A MYPI2015001362A MYPI2015001362A MY170333A MY 170333 A MY170333 A MY 170333A MY PI2015001362 A MYPI2015001362 A MY PI2015001362A MY PI2015001362 A MYPI2015001362 A MY PI2015001362A MY 170333 A MY170333 A MY 170333A
- Authority
- MY
- Malaysia
- Prior art keywords
- devices
- vertical semiconductor
- resistance
- specifications
- precise trimming
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
- H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
- H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
- H01L23/5258—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive the change of state resulting from the use of an external beam, e.g. laser beam or ion beam
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D1/00—Resistors, capacitors or inductors
- H10D1/40—Resistors
- H10D1/47—Resistors having no potential barriers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
- H10D12/01—Manufacture or treatment
- H10D12/031—Manufacture or treatment of IGBTs
- H10D12/032—Manufacture or treatment of IGBTs of vertical IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
- H10D12/411—Insulated-gate bipolar transistors [IGBT]
- H10D12/441—Vertical IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
- H10D30/0291—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/63—Vertical IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/66—Vertical DMOS [VDMOS] FETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/811—Combinations of field-effect devices and one or more diodes, capacitors or resistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B20/00—Read-only memory [ROM] devices
- H10B20/20—Programmable ROM [PROM] devices comprising field-effect components
- H10B20/25—One-time programmable ROM [OTPROM] devices, e.g. using electrically-fusible links
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201261729720P | 2012-11-26 | 2012-11-26 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| MY170333A true MY170333A (en) | 2019-07-17 |
Family
ID=50772486
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| MYPI2015001362A MY170333A (en) | 2012-11-26 | 2013-11-26 | Device architecture and method for precision enhancement of vertical semiconductor devices |
Country Status (7)
| Country | Link |
|---|---|
| US (3) | US9117709B2 (enExample) |
| EP (1) | EP2923375A4 (enExample) |
| JP (1) | JP6276905B2 (enExample) |
| KR (1) | KR20150092212A (enExample) |
| CN (2) | CN108389807A (enExample) |
| MY (1) | MY170333A (enExample) |
| WO (1) | WO2014082098A1 (enExample) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9704598B2 (en) * | 2014-12-27 | 2017-07-11 | Intel Corporation | Use of in-field programmable fuses in the PCH dye |
| JP6610785B2 (ja) * | 2016-07-04 | 2019-11-27 | 三菱電機株式会社 | 半導体装置の製造方法 |
| WO2018125110A1 (en) * | 2016-12-29 | 2018-07-05 | Intel Corporation | Configurable resistor |
| CN107065997B (zh) * | 2017-02-09 | 2018-10-26 | 张帅 | 修调功率器件输入电阻的控制方法 |
| CN107769767B (zh) * | 2017-10-16 | 2021-03-09 | 苏州浪潮智能科技有限公司 | 一种电阻修调电路及方法 |
| US10650888B1 (en) * | 2018-12-26 | 2020-05-12 | Micron Technology, Inc. | Tuning voltages in a read circuit |
| WO2020209110A1 (ja) * | 2019-04-08 | 2020-10-15 | ローム株式会社 | デバイスパラメータの測定方法 |
| CN115461847A (zh) * | 2021-03-31 | 2022-12-09 | 华为技术有限公司 | 一种场效应晶体管、其制作方法、开关电路及电路板 |
| JP7775618B2 (ja) * | 2021-10-05 | 2025-11-26 | 富士電機株式会社 | デバイス、半導体装置、ゲートドライバ、および、パワーモジュール |
| CN115684864B (zh) * | 2023-01-05 | 2023-03-31 | 佛山市联动科技股份有限公司 | 适于开关时间测试和阈值电压测试的测试电路及测试方法 |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3532383A1 (de) * | 1985-09-11 | 1987-03-19 | Bosch Gmbh Robert | Multizellentransistor |
| US4779060A (en) * | 1987-06-01 | 1988-10-18 | Gentron Corporation | Linear power amplifying system |
| JP2664793B2 (ja) * | 1990-04-06 | 1997-10-22 | 株式会社東芝 | 半導体装置の製造方法 |
| US5446310A (en) * | 1992-06-08 | 1995-08-29 | North Carolina State University | Integrated circuit power device with external disabling of defective devices and method of fabricating same |
| US5563447A (en) * | 1993-09-07 | 1996-10-08 | Delco Electronics Corp. | High power semiconductor switch module |
| JPH08316327A (ja) * | 1995-05-18 | 1996-11-29 | Sony Corp | 半導体装置の製造方法 |
| GB9605672D0 (en) * | 1996-03-18 | 1996-05-22 | Westinghouse Brake & Signal | Insulated gate bipolar transistors |
| KR100251528B1 (ko) * | 1997-10-22 | 2000-04-15 | 김덕중 | 복수개의 센스 소오스 패드를 구비한 센스 전계효과 트랜지스터 |
| US20050007160A1 (en) * | 2003-07-10 | 2005-01-13 | Neff Robert M. R. | Tunable differential transconductor and adjustment method |
| US7271643B2 (en) * | 2005-05-26 | 2007-09-18 | International Business Machines Corporation | Circuit for blowing an electrically blowable fuse in SOI technologies |
| GB2444740A (en) | 2006-12-14 | 2008-06-18 | Cambridge Semiconductor Ltd | Trimming integrated circuits |
| US7960997B2 (en) | 2007-08-08 | 2011-06-14 | Advanced Analogic Technologies, Inc. | Cascode current sensor for discrete power semiconductor devices |
| US10600902B2 (en) * | 2008-02-13 | 2020-03-24 | Vishay SIliconix, LLC | Self-repairing field effect transisitor |
| DE102009047670B4 (de) * | 2009-12-08 | 2020-07-30 | Robert Bosch Gmbh | Schaltungseinrichtung mit einem Halbleiter-Bauelement |
| JP2012160538A (ja) * | 2011-01-31 | 2012-08-23 | Elpida Memory Inc | 半導体装置 |
| KR20130017349A (ko) * | 2011-08-10 | 2013-02-20 | 삼성전자주식회사 | 모니터링 패드 및 이를 포함하는 반도체 장치 |
-
2013
- 2013-11-26 MY MYPI2015001362A patent/MY170333A/en unknown
- 2013-11-26 EP EP13856431.5A patent/EP2923375A4/en not_active Withdrawn
- 2013-11-26 CN CN201810153423.5A patent/CN108389807A/zh active Pending
- 2013-11-26 WO PCT/US2013/072111 patent/WO2014082098A1/en not_active Ceased
- 2013-11-26 KR KR1020157017256A patent/KR20150092212A/ko not_active Ceased
- 2013-11-26 US US14/091,315 patent/US9117709B2/en not_active Expired - Fee Related
- 2013-11-26 JP JP2015544198A patent/JP6276905B2/ja not_active Expired - Fee Related
- 2013-11-26 CN CN201380071294.0A patent/CN105051876B/zh not_active Expired - Fee Related
-
2015
- 2015-08-03 US US14/816,911 patent/US9589889B2/en not_active Expired - Fee Related
-
2017
- 2017-03-06 US US15/451,074 patent/US9997455B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| CN105051876B (zh) | 2018-03-27 |
| US9117709B2 (en) | 2015-08-25 |
| CN108389807A (zh) | 2018-08-10 |
| US20140145240A1 (en) | 2014-05-29 |
| EP2923375A4 (en) | 2016-07-20 |
| EP2923375A1 (en) | 2015-09-30 |
| JP6276905B2 (ja) | 2018-02-07 |
| US9997455B2 (en) | 2018-06-12 |
| WO2014082098A1 (en) | 2014-05-30 |
| US9589889B2 (en) | 2017-03-07 |
| CN105051876A (zh) | 2015-11-11 |
| US20150340318A1 (en) | 2015-11-26 |
| JP2016508284A (ja) | 2016-03-17 |
| US20170179024A1 (en) | 2017-06-22 |
| KR20150092212A (ko) | 2015-08-12 |
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