MY131237A - Process controls for improved wafer uniformity using integrated or standalone metrology - Google Patents

Process controls for improved wafer uniformity using integrated or standalone metrology

Info

Publication number
MY131237A
MY131237A MYPI20045152A MYPI20045152A MY131237A MY 131237 A MY131237 A MY 131237A MY PI20045152 A MYPI20045152 A MY PI20045152A MY PI20045152 A MYPI20045152 A MY PI20045152A MY 131237 A MY131237 A MY 131237A
Authority
MY
Malaysia
Prior art keywords
wafer
map
integrated
dimension
process controls
Prior art date
Application number
MYPI20045152A
Other languages
English (en)
Inventor
Gowri Kota
Jorge Luque
Original Assignee
Lam Res Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lam Res Corp filed Critical Lam Res Corp
Publication of MY131237A publication Critical patent/MY131237A/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67242Apparatus for monitoring, sorting or marking
    • H01L21/67253Process monitoring, e.g. flow or thickness monitoring
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/907Continuous processing

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
MYPI20045152A 2003-12-24 2004-12-15 Process controls for improved wafer uniformity using integrated or standalone metrology MY131237A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/746,969 US7018855B2 (en) 2003-12-24 2003-12-24 Process controls for improved wafer uniformity using integrated or standalone metrology

Publications (1)

Publication Number Publication Date
MY131237A true MY131237A (en) 2007-07-31

Family

ID=34710759

Family Applications (1)

Application Number Title Priority Date Filing Date
MYPI20045152A MY131237A (en) 2003-12-24 2004-12-15 Process controls for improved wafer uniformity using integrated or standalone metrology

Country Status (8)

Country Link
US (1) US7018855B2 (ja)
EP (1) EP1697986B1 (ja)
JP (2) JP2007517400A (ja)
KR (1) KR100969636B1 (ja)
CN (2) CN101369551B (ja)
MY (1) MY131237A (ja)
TW (1) TWI326105B (ja)
WO (1) WO2005067009A2 (ja)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7049157B2 (en) * 2004-03-11 2006-05-23 Taiwan Semiconductor Manufacturing Co., Ltd. Calibration standard for critical dimension verification of sub-tenth micron integrated circuit technology
JP4444090B2 (ja) * 2004-12-13 2010-03-31 東京エレクトロン株式会社 熱処理板の温度設定方法,熱処理板の温度設定装置,プログラム及びプログラムを記録したコンピュータ読み取り可能な記録媒体
KR100909474B1 (ko) * 2005-08-10 2009-07-28 삼성전자주식회사 웨이퍼 결함지수를 사용하여 국부성 불량 모드를 갖는결함성 반도체 웨이퍼의 검출 방법들 및 이에 사용되는장비들
JP4874606B2 (ja) * 2005-09-12 2012-02-15 株式会社東芝 用力設備設計装置、自動用力設備設計方法及び用力設備設計プログラム
US7534627B2 (en) * 2006-08-07 2009-05-19 Sokudo Co., Ltd. Methods and systems for controlling critical dimensions in track lithography tools
US7444198B2 (en) * 2006-12-15 2008-10-28 Applied Materials, Inc. Determining physical property of substrate
US20080237811A1 (en) * 2007-03-30 2008-10-02 Rohit Pal Method for preserving processing history on a wafer
US7952708B2 (en) 2007-04-02 2011-05-31 Applied Materials, Inc. High throughput measurement system
TWI416096B (zh) * 2007-07-11 2013-11-21 Nova Measuring Instr Ltd 用於監控圖案化結構的性質之方法及系統
JP5174098B2 (ja) * 2010-08-09 2013-04-03 東京エレクトロン株式会社 熱処理方法及びその熱処理方法を実行させるためのプログラムを記録した記録媒体並びに熱処理装置
US8906710B2 (en) 2011-12-23 2014-12-09 Taiwan Semiconductor Manufacturing Company, Ltd. Monitor test key of epi profile
US8852964B2 (en) * 2013-02-04 2014-10-07 Lam Research Corporation Controlling CD and CD uniformity with trim time and temperature on a wafer by wafer basis
WO2016037003A1 (en) 2014-09-03 2016-03-10 Kla-Tencor Corporation Optimizing the utilization of metrology tools
US9779202B2 (en) * 2015-06-22 2017-10-03 Kla-Tencor Corporation Process-induced asymmetry detection, quantification, and control using patterned wafer geometry measurements
WO2018031193A1 (en) * 2016-08-12 2018-02-15 Applied Materials, Inc. Critical methodology in vacuum chambers to determine gap and leveling between wafer and hardware components
JP6784127B2 (ja) * 2016-10-04 2020-11-11 株式会社村田製作所 半導体デバイスの製造方法

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4571685A (en) 1982-06-23 1986-02-18 Nec Corporation Production system for manufacturing semiconductor devices
US5795493A (en) 1995-05-01 1998-08-18 Motorola, Inc. Laser assisted plasma chemical etching method
US5943550A (en) 1996-03-29 1999-08-24 Advanced Micro Devices, Inc. Method of processing a semiconductor wafer for controlling drive current
US6015718A (en) * 1997-08-14 2000-01-18 Cypress Semiconductor Corporation Indentification of the composition of particles in a process chamber
KR20010024608A (ko) * 1998-09-14 2001-03-26 마츠시타 덴끼 산교 가부시키가이샤 반도체장치의 제조장치 및 그 제조방법
US6706541B1 (en) * 1999-10-20 2004-03-16 Advanced Micro Devices, Inc. Method and apparatus for controlling wafer uniformity using spatially resolved sensors
WO2001084382A1 (en) * 2000-05-04 2001-11-08 Kla-Tencor, Inc. Methods and systems for lithography process control
US6304999B1 (en) 2000-10-23 2001-10-16 Advanced Micro Devices, Inc. Method and apparatus for embedded process control framework in tool systems
US6346426B1 (en) * 2000-11-17 2002-02-12 Advanced Micro Devices, Inc. Method and apparatus for characterizing semiconductor device performance variations based on independent critical dimension measurements
US6625497B2 (en) 2000-11-20 2003-09-23 Applied Materials Inc. Semiconductor processing module with integrated feedback/feed forward metrology
AU2002341677A1 (en) 2001-09-18 2003-04-01 Applied Materials, Inc. Integrated equipment set for forming an interconnect on a substrate
JP2003203841A (ja) * 2002-01-07 2003-07-18 Mitsubishi Electric Corp 評価方法、製造条件補正方法及び半導体装置の製造方法
US6858361B2 (en) 2002-03-01 2005-02-22 David S. L. Mui Methodology for repeatable post etch CD in a production tool
US7225047B2 (en) * 2002-03-19 2007-05-29 Applied Materials, Inc. Method, system and medium for controlling semiconductor wafer processes using critical dimension measurements
US6783904B2 (en) * 2002-05-17 2004-08-31 Freescale Semiconductor, Inc. Lithography correction method and device
US6862491B2 (en) * 2002-05-22 2005-03-01 Applied Materials Israel, Ltd. System and method for process variation monitor
US6770852B1 (en) * 2003-02-27 2004-08-03 Lam Research Corporation Critical dimension variation compensation across a wafer by means of local wafer temperature control

Also Published As

Publication number Publication date
CN101369551B (zh) 2010-07-14
CN100435307C (zh) 2008-11-19
TW200527489A (en) 2005-08-16
KR100969636B1 (ko) 2010-07-14
EP1697986B1 (en) 2020-07-08
JP2007517400A (ja) 2007-06-28
EP1697986A2 (en) 2006-09-06
JP2011228722A (ja) 2011-11-10
US20050148104A1 (en) 2005-07-07
JP5621086B2 (ja) 2014-11-05
KR20060122876A (ko) 2006-11-30
CN1898788A (zh) 2007-01-17
CN101369551A (zh) 2009-02-18
WO2005067009A3 (en) 2005-08-18
US7018855B2 (en) 2006-03-28
WO2005067009A2 (en) 2005-07-21
TWI326105B (en) 2010-06-11

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