MXPA96002171A - Un paquete de circuito integrado digital de alto rendimiento que usa formato e/s bga (arreglo en rejilla de bolas), y una sola capa de substrato de ceramica con tecnologia bimetalica de via rellena. - Google Patents

Un paquete de circuito integrado digital de alto rendimiento que usa formato e/s bga (arreglo en rejilla de bolas), y una sola capa de substrato de ceramica con tecnologia bimetalica de via rellena.

Info

Publication number
MXPA96002171A
MXPA96002171A MXPA96002171A MX9602171A MXPA96002171A MX PA96002171 A MXPA96002171 A MX PA96002171A MX PA96002171 A MXPA96002171 A MX PA96002171A MX 9602171 A MX9602171 A MX 9602171A MX PA96002171 A MXPA96002171 A MX PA96002171A
Authority
MX
Mexico
Prior art keywords
integrated circuit
clause
digital integrated
circuit package
digital
Prior art date
Application number
MXPA96002171A
Other languages
English (en)
Spanish (es)
Inventor
L Greenman Norman
Original Assignee
Circuit Components Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Circuit Components Inc filed Critical Circuit Components Inc
Publication of MXPA96002171A publication Critical patent/MXPA96002171A/es

Links

Classifications

    • H10W76/153—
    • H10W70/60—
    • H10W40/228—
    • H10W70/635—
    • H10W70/692—
    • H10W74/117—
    • H10W70/682—
    • H10W70/685—
    • H10W72/884—
    • H10W90/724—
    • H10W90/734—
    • H10W90/754—

Landscapes

  • Wire Bonding (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
MXPA96002171A 1995-06-06 1996-06-05 Un paquete de circuito integrado digital de alto rendimiento que usa formato e/s bga (arreglo en rejilla de bolas), y una sola capa de substrato de ceramica con tecnologia bimetalica de via rellena. MXPA96002171A (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US47109595A 1995-06-06 1995-06-06

Publications (1)

Publication Number Publication Date
MXPA96002171A true MXPA96002171A (es) 2002-04-19

Family

ID=23870234

Family Applications (1)

Application Number Title Priority Date Filing Date
MXPA96002171A MXPA96002171A (es) 1995-06-06 1996-06-05 Un paquete de circuito integrado digital de alto rendimiento que usa formato e/s bga (arreglo en rejilla de bolas), y una sola capa de substrato de ceramica con tecnologia bimetalica de via rellena.

Country Status (6)

Country Link
JP (1) JPH09213829A (OSRAM)
KR (1) KR970003879A (OSRAM)
DE (1) DE19622650A1 (OSRAM)
GB (1) GB2301937A (OSRAM)
MX (1) MXPA96002171A (OSRAM)
TW (1) TW299487B (OSRAM)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6284566B1 (en) 1996-05-17 2001-09-04 National Semiconductor Corporation Chip scale package and method for manufacture thereof
US5783866A (en) * 1996-05-17 1998-07-21 National Semiconductor Corporation Low cost ball grid array device and method of manufacture thereof
US6140708A (en) * 1996-05-17 2000-10-31 National Semiconductor Corporation Chip scale package and method for manufacture thereof
JPH11219984A (ja) * 1997-11-06 1999-08-10 Sharp Corp 半導体装置パッケージおよびその製造方法ならびにそのための回路基板
GB9818474D0 (en) * 1998-08-26 1998-10-21 Hughes John E Multi-layer interconnect package for optical devices & standard semiconductor chips
US6198166B1 (en) * 1999-07-01 2001-03-06 Intersil Corporation Power semiconductor mounting package containing ball grid array
DE10010461A1 (de) * 2000-03-03 2001-09-13 Infineon Technologies Ag Vorrichtung zum Verpacken elektronischer Bauteile mittels Spritzgußtechnik
GB2377080B (en) * 2001-09-11 2003-05-07 Sendo Int Ltd Integrated circuit package and printed circuit board arrangement
JP6397806B2 (ja) 2015-09-11 2018-09-26 東芝メモリ株式会社 半導体装置の製造方法および半導体装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5355283A (en) * 1993-04-14 1994-10-11 Amkor Electronics, Inc. Ball grid array with via interconnection
US5490324A (en) * 1993-09-15 1996-02-13 Lsi Logic Corporation Method of making integrated circuit package having multiple bonding tiers
TW272311B (OSRAM) * 1994-01-12 1996-03-11 At & T Corp

Also Published As

Publication number Publication date
JPH09213829A (ja) 1997-08-15
TW299487B (OSRAM) 1997-03-01
KR970003879A (ko) 1997-01-29
DE19622650A1 (de) 1996-12-12
GB2301937A (en) 1996-12-18
GB9611726D0 (en) 1996-08-07

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