MX9604528A - Unidad de memoria de sistema con desempeño/costo mejorado, que utiliza memoria de acceso aleatorio dinamica con salida de datos extendida. - Google Patents
Unidad de memoria de sistema con desempeño/costo mejorado, que utiliza memoria de acceso aleatorio dinamica con salida de datos extendida.Info
- Publication number
- MX9604528A MX9604528A MX9604528A MX9604528A MX9604528A MX 9604528 A MX9604528 A MX 9604528A MX 9604528 A MX9604528 A MX 9604528A MX 9604528 A MX9604528 A MX 9604528A MX 9604528 A MX9604528 A MX 9604528A
- Authority
- MX
- Mexico
- Prior art keywords
- memory
- edodrams
- registers
- generation circuitry
- address
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
- G11C7/1018—Serial bit line access mode, e.g. using bit line address shift registers, bit line address counters, bit line burst counters
- G11C7/1021—Page serial bit line access mode, i.e. using an enabled row address stroke pulse with its associated word line address and a sequence of enabled column address stroke pulses each with its associated bit line address
- G11C7/1024—Extended data output [EDO] mode, i.e. keeping output buffer enabled during an extended period of time
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Dram (AREA)
- Microcomputers (AREA)
Abstract
Se proporciona una unidad de memoria de sistema a un sistema de computadora que comprende circuitos para generacion de control y direccion de memoria, una cantidad de bancos de memoria de acceso aleatorio dinámica con salida de datos extendida (EDODRAM), y una cantidad de registros. Los circuitos para generacion de control y direccion de memoria se emplea para generar direcciones de memoria para las EDODRAMs, suministradas ventajosamente sobre dos líneas de conducto de direccion. Adicionalmente, los circuitos para generacion de control de direccion de memoria se emplea para generar señales de control para las EDODRAMs y los registros, incluyendo señales estroboscopicas de direccion de columna "recortadas" ventajosamente (CAS). Las EDODRAMs se emplean para aceptar, almacenar y enviar de salida datos, de acuerdo con direcciones de memoria proporcionadas. Se emplean los registros para proporcionar en etapas los datos que se sacan continuamente de o hacia las EDODRAMs. Como resultado de las formas ventajosas en las que las direcciones de memoria y las señales de CAS se proporcionan, el tiempo de ciclo de un acceso de memoria se reduce, incluso si los elementos de circuito basados en tecnología CMOS más lentos para constituir los circuitos para generacion de control y direccion de memoria, la EDODARAM, y los registros.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US08225522 | 1994-04-11 | ||
| US08/225,522 US5692148A (en) | 1994-04-11 | 1994-04-11 | Method and apparatus for improving system memory cost/performance using extended data out (EDO)DRAM and split column addresses |
| PCT/US1995/004189 WO1995028669A2 (en) | 1994-04-11 | 1995-04-03 | System memory unit and method in a computer using extended data out (edo) dram |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| MX9604528A true MX9604528A (es) | 1997-09-30 |
| MXPA96004528A MXPA96004528A (es) | 1998-07-03 |
Family
ID=
Also Published As
| Publication number | Publication date |
|---|---|
| CA2186139A1 (en) | 1995-10-26 |
| AU2206895A (en) | 1995-11-10 |
| WO1995028669A2 (en) | 1995-10-26 |
| BR9507454A (pt) | 1999-06-15 |
| EP0755539A4 (en) | 1997-11-12 |
| EP0755539A1 (en) | 1997-01-29 |
| US5692148A (en) | 1997-11-25 |
| CA2186139C (en) | 2004-11-16 |
| WO1995028669A3 (en) | 1995-11-30 |
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