MX394365B - Transmisor y método de acortamiento del mismo. - Google Patents
Transmisor y método de acortamiento del mismo.Info
- Publication number
- MX394365B MX394365B MX2019010686A MX2019010686A MX394365B MX 394365 B MX394365 B MX 394365B MX 2019010686 A MX2019010686 A MX 2019010686A MX 2019010686 A MX2019010686 A MX 2019010686A MX 394365 B MX394365 B MX 394365B
- Authority
- MX
- Mexico
- Prior art keywords
- bits
- bit groups
- ldpc
- zero
- transmitter
- Prior art date
Links
- 238000004904 shortening Methods 0.000 title abstract 2
- 238000000034 method Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
- H03M13/155—Shortening or extension of codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
- H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
- H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/253—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with concatenated codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
- H03M13/2707—Simple row-column interleaver, i.e. pure block interleaving
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2778—Interleaver using block-wise interleaving, e.g. the interleaving matrix is sub-divided into sub-matrices and the permutation is performed in blocks of sub-matrices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/611—Specific encoding aspects, e.g. encoding by means of decoding
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/615—Use of computational or mathematical techniques
- H03M13/616—Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/618—Shortening and extension of codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/635—Error control coding in combination with rate matching
- H03M13/6362—Error control coding in combination with rate matching by puncturing
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/635—Error control coding in combination with rate matching
- H03M13/6362—Error control coding in combination with rate matching by puncturing
- H03M13/6368—Error control coding in combination with rate matching by puncturing using rate compatible puncturing or complementary puncturing
- H03M13/6393—Rate compatible low-density parity check [LDPC] codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0045—Arrangements at the receiver end
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0061—Error detection codes
- H04L1/0063—Single parity check
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0064—Concatenated codes
- H04L1/0065—Serial concatenated codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0067—Rate matching
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0067—Rate matching
- H04L1/0068—Rate matching by puncturing
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0071—Use of interleaving
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L2001/0092—Error control systems characterised by the topology of the transmission link
- H04L2001/0093—Point-to-multipoint
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- General Physics & Mathematics (AREA)
- Pure & Applied Mathematics (AREA)
- Algebra (AREA)
- Mathematical Optimization (AREA)
- Mathematical Analysis (AREA)
- Computational Mathematics (AREA)
- Multimedia (AREA)
- Computing Systems (AREA)
- Error Detection And Correction (AREA)
Abstract
Se proporciona un transmisor. El transmisor incluye: un codificador exterior configurado para codificar bits de entrada para generar bits codificados exteriores incluyendo los bits de entrada y los bits de paridad; un rellenador de ceros configurado para generar una pluralidad de grupos de bits, cada uno de los cuales es formado de un mismo número de bits, mapear los bits codificados exteriores a algunos de los bits en los grupos de bits, y rellenar bits cero a bits remanentes en los grupos de bits, con base en un patrón de acortamiento predeterminado, para así constituir bits de información de Comprobación de Paridad de Baja Densidad (LDPC); y un codificador LDPC configurado para codificar los bits de información LDPC, en donde los bits remanentes, en los cuales son rellenados los bits cero, incluyen algunos de los grupos de bits que no están colocados en secuencia en los bits de información LDPC.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201562127027P | 2015-03-02 | 2015-03-02 | |
| KR1020150137184A KR102326036B1 (ko) | 2015-03-02 | 2015-09-27 | 송신 장치 및 그의 쇼트닝 방법 |
| PCT/KR2016/002087 WO2016140510A1 (en) | 2015-03-02 | 2016-03-02 | Transmitter and shortening method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| MX2019010686A MX2019010686A (es) | 2019-10-24 |
| MX394365B true MX394365B (es) | 2025-03-24 |
Family
ID=56848580
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| MX2019010686A MX394365B (es) | 2015-03-02 | 2016-03-02 | Transmisor y método de acortamiento del mismo. |
Country Status (5)
| Country | Link |
|---|---|
| US (2) | US10340952B2 (es) |
| KR (1) | KR102627387B1 (es) |
| CN (2) | CN112187287B (es) |
| MX (1) | MX394365B (es) |
| WO (1) | WO2016140510A1 (es) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10951746B2 (en) * | 2018-05-11 | 2021-03-16 | Shanghai Langbo Communication Technology Company Limited | Method and device in UE and base station used for wireless communication |
| CN110474712B (zh) * | 2018-05-11 | 2022-03-29 | 上海朗帛通信技术有限公司 | 一种被用于无线通信的用户设备、基站中的方法和装置 |
| WO2021136662A1 (en) * | 2019-12-30 | 2021-07-08 | Sony Group Corporation | Communication devices and methods |
| CN118353575A (zh) * | 2023-01-13 | 2024-07-16 | 华为技术有限公司 | 传输数据的方法、装置、设备、系统及存储介质 |
Family Cites Families (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US102991A (en) * | 1870-05-10 | Improvement in wooden street pavements | ||
| WO2005089331A2 (en) * | 2004-03-15 | 2005-09-29 | Wionics Research | Generalized puncturing in a communication system |
| US7934137B2 (en) | 2006-02-06 | 2011-04-26 | Qualcomm Incorporated | Message remapping and encoding |
| CN1976238A (zh) * | 2006-12-21 | 2007-06-06 | 复旦大学 | 基于块填充算法的准循环低密度奇偶校验码的构造方法 |
| JP5507813B2 (ja) * | 2007-02-16 | 2014-05-28 | パナソニック株式会社 | 送信装置及び受信装置 |
| ES2353578T3 (es) | 2008-02-04 | 2011-03-03 | Lg Electronics Inc. | Aparato para transmitir y recibir una señal y procedimiento para transmitir y recibir una señal. |
| EP2099150B1 (en) * | 2008-03-03 | 2012-04-18 | Samsung Electronics Co., Ltd. | Method and apparatus for transmitting encoded control information in a wireless communication system |
| CN102100046B (zh) | 2008-10-21 | 2013-11-13 | Lg电子株式会社 | 用于发送和接收信号的装置以及用于发送和接收信号的方法 |
| WO2010050656A1 (en) * | 2008-10-31 | 2010-05-06 | Lg Electronics Inc. | Apparatus for transmitting and receiving a signal and method of transmitting and receiving a signal |
| US8644406B2 (en) | 2009-01-09 | 2014-02-04 | Lg Electronics Inc. | Apparatus for transmitting and receiving a signal and method of transmitting and receiving a signal |
| US20100241923A1 (en) | 2009-03-17 | 2010-09-23 | Broadcom Corporation | Communication device employing LDPC (Low Density Parity Check) coding with Reed-Solomon (RS) and/or binary product coding |
| TWI427936B (zh) * | 2009-05-29 | 2014-02-21 | Sony Corp | 接收設備,接收方法,程式,及接收系統 |
| KR101611169B1 (ko) | 2011-01-18 | 2016-04-11 | 삼성전자주식회사 | 통신/방송 시스템에서 데이터 송수신 장치 및 방법 |
| JP5664919B2 (ja) | 2011-06-15 | 2015-02-04 | ソニー株式会社 | データ処理装置、及び、データ処理方法 |
| EP2560311A1 (en) | 2011-08-17 | 2013-02-20 | Panasonic Corporation | Cyclic-block permutations for spatial multiplexing with quasi-cyclic LDPC codes |
| KR101791477B1 (ko) | 2011-10-10 | 2017-10-30 | 삼성전자주식회사 | 통신/방송 시스템에서 데이터 송수신 장치 및 방법 |
| US8873672B2 (en) * | 2012-03-21 | 2014-10-28 | Broadcom Corporation | Concatenated coding scheme for burst noise and AWGN for multi-channel applications |
-
2016
- 2016-03-02 CN CN202011081881.6A patent/CN112187287B/zh active Active
- 2016-03-02 WO PCT/KR2016/002087 patent/WO2016140510A1/en not_active Ceased
- 2016-03-02 CN CN202011081915.1A patent/CN112217607B/zh active Active
- 2016-03-02 MX MX2019010686A patent/MX394365B/es unknown
- 2016-03-02 US US15/058,353 patent/US10340952B2/en active Active
-
2022
- 2022-11-07 US US17/982,000 patent/US11824557B2/en active Active
- 2022-11-08 KR KR1020220148067A patent/KR102627387B1/ko active Active
Also Published As
| Publication number | Publication date |
|---|---|
| US20160261283A1 (en) | 2016-09-08 |
| US11824557B2 (en) | 2023-11-21 |
| WO2016140510A1 (en) | 2016-09-09 |
| MX2019010686A (es) | 2019-10-24 |
| CN112187287A (zh) | 2021-01-05 |
| CN112187287B (zh) | 2023-09-01 |
| CN112217607A (zh) | 2021-01-12 |
| CN112217607B (zh) | 2024-02-23 |
| US10340952B2 (en) | 2019-07-02 |
| KR20220155952A (ko) | 2022-11-24 |
| KR102627387B1 (ko) | 2024-01-23 |
| US20230065312A1 (en) | 2023-03-02 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| MX2017011150A (es) | Transmisor y metodo de acortamiento del mismo. | |
| MX388473B (es) | Transmisor y método de acortamiento del mismo. | |
| MX2020004656A (es) | Transmisor y metodo de acortamiento del mismo. | |
| MX2019009589A (es) | Transmisor y metodo de permutacion de paridad del mismo. | |
| MX384170B (es) | Dispositivo de procesamiento de datos y método de procesamiento de datos. | |
| MX389047B (es) | Dispositivo de procesamiento de datos y metodo de procesamiento de datos. | |
| MX2019014454A (es) | Aparato de transmision y metodo de intercalacion del mismo. | |
| MX2019014467A (es) | Aparato de transmision y metodo de intercalacion del mismo. | |
| MX2016010776A (es) | Aparato de transmision y metodo de intercalacion del mismo. | |
| MX387085B (es) | Entrelazador de bits para palabra codigo de revision de paridad de baja densidad que tiene una longitud de 16200 y un indice de codigo de 3/15 y mapeo de 64 simbolos, y metodo para entrelazar bits que utiliza el mismo. | |
| MX392428B (es) | Dispositivo de procesamiento de datos y metodo de procesamiento de datos. | |
| MX373956B (es) | Entrelazador de bits para palabra codigo de revision de paridad de baja densidad que tiene una longitud de 64800 y un indice de codigo de 5/15 y mapeo de 64 simbolos, y metodo para entrelazar bits que utiliza el mismo. | |
| MX2019015600A (es) | Transmisor y metodo de permutacion de paridad del mismo. | |
| MX373707B (es) | Aparato de intercalado de paridad para codificar la informacion de señalizacion de longitud variable y metodo de intercalado de paridad que lo utiliza. | |
| MX2020003791A (es) | Entrelazador de bits para palabra codigo de revision de paridad de baja densidad que tiene una longitud de 16200 y un indice de codigo de 10/15 y mapeo de 256 simbolos, y metodo para entrelazar bits que utiliza el mismo. | |
| MX2019014457A (es) | Aparato de transmision y metodo de intercalacion del mismo. | |
| MX2020011644A (es) | Transmisor y metodo de permutacion de paridad del mismo. | |
| MX394365B (es) | Transmisor y método de acortamiento del mismo. | |
| MX2019015682A (es) | Aparato de relleno con ceros para codificar la informacion de se?alizacion de longitud variable y metodo de relleno con ceros que lo utiliza. | |
| MX2017011152A (es) | Transmisor y metodo de segmentacion del mismo. | |
| MX2019015685A (es) | Aparato de relleno con ceros para codificar la informacion de se?alizacion de longitud fija y metodo de relleno con ceros que lo utiliza. | |
| MX2017011146A (es) | Transmisor y metodo de permutacion de paridad del mismo. | |
| MX373958B (es) | Codificador de revision de paridad de baja densidad y metodo de codificacion de revision de paridad de baja densidad que utiliza el mismo. | |
| MX367837B (es) | Transmisor y método de acortamiento del mismo. | |
| MX376908B (es) | Transmisor y metodo de permutacion de paridad del mismo. |