MX388473B - Transmisor y método de acortamiento del mismo. - Google Patents

Transmisor y método de acortamiento del mismo.

Info

Publication number
MX388473B
MX388473B MX2019010683A MX2019010683A MX388473B MX 388473 B MX388473 B MX 388473B MX 2019010683 A MX2019010683 A MX 2019010683A MX 2019010683 A MX2019010683 A MX 2019010683A MX 388473 B MX388473 B MX 388473B
Authority
MX
Mexico
Prior art keywords
bits
ldpc
zero
information bits
bit groups
Prior art date
Application number
MX2019010683A
Other languages
English (en)
Other versions
MX2019010683A (es
Inventor
Hong-Sil Jeong
Kyung-Joong Kim
Se-Ho Myung
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR1020150137181A external-priority patent/KR101800424B1/ko
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of MX2019010683A publication Critical patent/MX2019010683A/es
Publication of MX388473B publication Critical patent/MX388473B/es

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/1157—Low-density generator matrices [LDGM]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/155—Shortening or extension of codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
    • H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
    • H03M13/618—Shortening and extension of codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041—Arrangements at the transmitter end
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1004—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's to protect a block of data words, e.g. CRC or checksum
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1191—Codes on graphs other than LDPC codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
    • H03M13/253—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with concatenated codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
    • H03M13/611—Specific encoding aspects, e.g. encoding by means of decoding
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0061—Error detection codes
    • H04L1/0063—Single parity check
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0067—Rate matching
    • H04L1/0068—Rate matching by puncturing
    • H04L1/0069—Puncturing patterns

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Probability & Statistics with Applications (AREA)
  • Mathematical Physics (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • General Physics & Mathematics (AREA)
  • Algebra (AREA)
  • Pure & Applied Mathematics (AREA)
  • Multimedia (AREA)
  • Error Detection And Correction (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Quality & Reliability (AREA)
  • Burglar Alarm Systems (AREA)

Abstract

Se proporciona un transmisor. El transmisor incluye: un codificador exterior configurado para codificar bits de entrada para generar bits codificados exteriores incluyendo los bits de entrada y los bits de paridad; un rellenador de ceros configurado para constituir bits de información de Comprobación de Paridad de Baja Densidad (LDPC) incluyendo los bits codificados exteriores y los bits cero; y un codificador LDPC configurado para codificar los bits de información LDPC, en donde los bits de información LDPC son divididos en una pluralidad de grupos de bits, y en donde el rellenador de ceros rellena bits cero para al menos algunos de la pluralidad de grupos de bits, cada uno de los cuales está formado de un cierto número de bits, para constituir los bits de información LDPC con base en un patrón de acortamiento predeterminado que establece que algunos de la pluralidad de grupos de bits no están colocados en secuencia en los bits de información LDPC.
MX2019010683A 2015-03-02 2016-03-02 Transmisor y método de acortamiento del mismo. MX388473B (es)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201562126999P 2015-03-02 2015-03-02
KR1020150137181A KR101800424B1 (ko) 2015-03-02 2015-09-27 송신 장치 및 그의 쇼트닝 방법
PCT/KR2016/002074 WO2016140504A1 (en) 2015-03-02 2016-03-02 Transmitter and shortening method thereof

Publications (2)

Publication Number Publication Date
MX2019010683A MX2019010683A (es) 2019-10-24
MX388473B true MX388473B (es) 2025-03-20

Family

ID=56849009

Family Applications (1)

Application Number Title Priority Date Filing Date
MX2019010683A MX388473B (es) 2015-03-02 2016-03-02 Transmisor y método de acortamiento del mismo.

Country Status (7)

Country Link
US (5) US10141951B2 (es)
KR (1) KR102411614B1 (es)
CN (2) CN112235000B (es)
CA (1) CA3206325A1 (es)
MX (1) MX388473B (es)
MY (2) MY199294A (es)
WO (1) WO2016140504A1 (es)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101776267B1 (ko) 2015-02-24 2017-09-07 삼성전자주식회사 송신 장치 및 그의 리피티션 방법
US10027350B2 (en) * 2015-02-24 2018-07-17 Samsung Electronics Co., Ltd. Transmitter and repetition method thereof
US10098172B2 (en) * 2015-05-15 2018-10-09 Qualcomm Incorporated Techniques for managing communication links of a plurality of radio access technologies (RATS)
CN112671687B (zh) * 2015-07-23 2024-04-05 三星电子株式会社 发送方法和接收方法
US10560218B2 (en) * 2017-01-05 2020-02-11 Huawei Technologies Co., Ltd. Apparatus and methods for decoding assistant bit-based polar code construction
US10484019B2 (en) * 2017-10-30 2019-11-19 Western Digital Technologies, Inc. Adaptive encoder/decoder
KR20250011884A (ko) 2023-07-12 2025-01-22 한국과학기술연구원 조직 재생을 위한 전기 자극 세포 활성 및 활성산소 제거 복합 디바이스

Family Cites Families (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3606412B2 (ja) * 1996-09-02 2005-01-05 ソニー株式会社 データ受信装置および方法
DE10030407B4 (de) * 1999-07-14 2011-09-01 Lg Electronics Inc. Verfahren zur optimalen Ratenanpassung in einem Mobilkommunikationssystem
JP4045521B2 (ja) * 1999-08-02 2008-02-13 ソニー株式会社 符号化装置および方法
AU768016B2 (en) * 2000-07-05 2003-11-27 Lg Electronics Inc. Method of configuring transmission in mobile communication system
AU2005202438B2 (en) * 2001-04-12 2006-06-29 Silverbrook Research Pty Ltd Interpreting coded surfaces having cyclic position codes
CN1531261A (zh) * 2003-03-14 2004-09-22 北京泰美世纪科技有限公司 一种数字交互式多媒体网络系统和利用该系统的数据传输方法
US7334181B2 (en) 2003-09-04 2008-02-19 The Directv Group, Inc. Method and system for providing short block length low density parity check (LDPC) codes
US7685500B2 (en) * 2003-11-25 2010-03-23 Intel Corporation Forward error correction coding in communication networks
CN100364237C (zh) 2004-02-09 2008-01-23 清华大学 非规则低密度奇偶校验码的系统码设计方法及其通信系统
US7996746B2 (en) * 2004-10-12 2011-08-09 Nortel Networks Limited Structured low-density parity-check (LDPC) code
US7900127B2 (en) * 2005-01-10 2011-03-01 Broadcom Corporation LDPC (Low Density Parity Check) codes with corresponding parity check matrices selectively constructed with CSI (Cyclic Shifted Identity) and null sub-matrices
US7861131B1 (en) * 2005-09-01 2010-12-28 Marvell International Ltd. Tensor product codes containing an iterative code
WO2008034292A1 (en) 2006-09-18 2008-03-27 Ming Yang Efficient frame structure for digital satellite communication
CN101267210B (zh) * 2007-03-12 2011-01-05 华为技术有限公司 数据编译码和收发方法及装置
US20100122143A1 (en) 2007-03-27 2010-05-13 Hughes Network Systems, Llc Method and system for providing low density parity check (ldpc) coding for scrambled coded multiple access (scma)
US8396142B2 (en) * 2007-05-04 2013-03-12 Qualcomm Incorporated System, method, and computer-readable medium for multilevel shaping for wireless communication systems
CN101325474B (zh) 2007-06-12 2012-05-09 中兴通讯股份有限公司 Ldpc码的混合自动请求重传的信道编码及调制映射方法
KR100937430B1 (ko) * 2008-01-25 2010-01-18 엘지전자 주식회사 신호 송수신 방법 및 신호 송수신 장치
KR100937429B1 (ko) * 2008-02-04 2010-01-18 엘지전자 주식회사 신호 송수신 방법 및 신호 송수신 장치
SI2091156T1 (sl) * 2008-02-18 2013-12-31 Samsung Electronics Co., Ltd. Aparat in postopek za kodiranje in dekodiranje kanala v komunikacijskem sistemu z uporabo paritetnih kod z nizko gostoto
CN102100046B (zh) * 2008-10-21 2013-11-13 Lg电子株式会社 用于发送和接收信号的装置以及用于发送和接收信号的方法
CN104158643B (zh) * 2008-10-31 2017-08-15 Lg电子株式会社 发送广播信号的方法
US8255760B2 (en) * 2008-11-05 2012-08-28 Broadcom Corporation Header encoding for single carrier (SC) and/or orthogonal frequency division multiplexing (OFDM) using shortening, puncturing, and/or repetition
US8503550B2 (en) * 2008-11-06 2013-08-06 Lg Electronics Inc. Apparatus for transmitting and receiving a signal and method of transmitting and receiving a signal
CN102265519B (zh) * 2009-01-09 2014-08-27 Lg电子株式会社 用于发送和接收信号的装置以及用于发送和接收信号的方法
KR101664428B1 (ko) * 2009-02-12 2016-10-10 엘지전자 주식회사 신호 송수신 장치 및 방법
CN102100067B (zh) * 2009-02-13 2013-04-24 Lg电子株式会社 用于发送和接收信号的装置以及用于发送和接收信号的方法
US9350490B2 (en) * 2009-02-18 2016-05-24 Lg Electronics Inc. Apparatus for transmitting and receiving a signal and method of transmitting and receiving a signal
AU2009341664B2 (en) * 2009-03-03 2014-03-20 Lg Electronics Inc. Apparatus for transmitting and receiving a signal and method of transmitting and receiving a signal
US8559539B2 (en) * 2009-06-26 2013-10-15 Nokia Corporation Method, apparatus and computer readable storage medium
JP5648440B2 (ja) 2010-11-22 2015-01-07 ソニー株式会社 データ処理装置、及び、データ処理方法
KR101611169B1 (ko) 2011-01-18 2016-04-11 삼성전자주식회사 통신/방송 시스템에서 데이터 송수신 장치 및 방법
JP5664919B2 (ja) 2011-06-15 2015-02-04 ソニー株式会社 データ処理装置、及び、データ処理方法
US8873672B2 (en) 2012-03-21 2014-10-28 Broadcom Corporation Concatenated coding scheme for burst noise and AWGN for multi-channel applications
WO2015041482A1 (en) * 2013-09-18 2015-03-26 Samsung Electronics Co., Ltd. Transmitting apparatus and puncturing method thereof
US9602243B2 (en) * 2014-08-26 2017-03-21 Electronics And Telecommunications Research Institute Low density parity check encoder, and low density parity check encoding method using the same

Also Published As

Publication number Publication date
US12074613B2 (en) 2024-08-27
MY182481A (en) 2021-01-25
CN112235000A (zh) 2021-01-15
MY199294A (en) 2023-10-24
KR102411614B1 (ko) 2022-06-22
US10141951B2 (en) 2018-11-27
US20160261285A1 (en) 2016-09-08
MX2019010683A (es) 2019-10-24
KR20210029757A (ko) 2021-03-16
US20210044304A1 (en) 2021-02-11
CN112234999A (zh) 2021-01-15
US20190149171A1 (en) 2019-05-16
US20230109262A1 (en) 2023-04-06
US10277251B2 (en) 2019-04-30
CN112235000B (zh) 2023-09-01
US10862510B2 (en) 2020-12-08
US20160261374A1 (en) 2016-09-08
CN112234999B (zh) 2023-08-29
CA3206325A1 (en) 2016-09-09
WO2016140504A1 (en) 2016-09-09
US11522561B2 (en) 2022-12-06

Similar Documents

Publication Publication Date Title
MX388473B (es) Transmisor y método de acortamiento del mismo.
MX2017011150A (es) Transmisor y metodo de acortamiento del mismo.
MX384170B (es) Dispositivo de procesamiento de datos y método de procesamiento de datos.
MX389047B (es) Dispositivo de procesamiento de datos y metodo de procesamiento de datos.
MX2019009589A (es) Transmisor y metodo de permutacion de paridad del mismo.
MX2020004657A (es) Transmisor y metodo de acortamiento del mismo.
MX392428B (es) Dispositivo de procesamiento de datos y metodo de procesamiento de datos.
MX2019014466A (es) Aparato de transmision y metodo de intercalacion del mismo.
MX2019014455A (es) Aparato de transmision y metodo de intercalacion del mismo.
MX2020004655A (es) Transmisor y metodo de segmentacion del mismo.
MX373707B (es) Aparato de intercalado de paridad para codificar la informacion de señalizacion de longitud variable y metodo de intercalado de paridad que lo utiliza.
MX2020003791A (es) Entrelazador de bits para palabra codigo de revision de paridad de baja densidad que tiene una longitud de 16200 y un indice de codigo de 10/15 y mapeo de 256 simbolos, y metodo para entrelazar bits que utiliza el mismo.
MX2019015600A (es) Transmisor y metodo de permutacion de paridad del mismo.
BR112017009424A2 (pt) decodificação de ldpc com precisão finita e ajuste dinâmico do número de iterações
MX2019014457A (es) Aparato de transmision y metodo de intercalacion del mismo.
MX2019015682A (es) Aparato de relleno con ceros para codificar la informacion de se?alizacion de longitud variable y metodo de relleno con ceros que lo utiliza.
MX394365B (es) Transmisor y método de acortamiento del mismo.
MX2019015685A (es) Aparato de relleno con ceros para codificar la informacion de se?alizacion de longitud fija y metodo de relleno con ceros que lo utiliza.
MX2017011146A (es) Transmisor y metodo de permutacion de paridad del mismo.
MX2017011149A (es) Transmisor y metodo de acortamiento del mismo.
MX376908B (es) Transmisor y metodo de permutacion de paridad del mismo.