MX393336B - Fabricacion de estructuras de chip invertido transmon qubit para dispositivos informaticos cuanticos - Google Patents

Fabricacion de estructuras de chip invertido transmon qubit para dispositivos informaticos cuanticos

Info

Publication number
MX393336B
MX393336B MX2021014838A MX2021014838A MX393336B MX 393336 B MX393336 B MX 393336B MX 2021014838 A MX2021014838 A MX 2021014838A MX 2021014838 A MX2021014838 A MX 2021014838A MX 393336 B MX393336 B MX 393336B
Authority
MX
Mexico
Prior art keywords
chip
subset
pads
quantum computing
fabricating
Prior art date
Application number
MX2021014838A
Other languages
English (en)
Other versions
MX2021014838A (es
Inventor
Jerry Chow
Sami Rosenblatt
Original Assignee
Int Business Machines Corporationi
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Int Business Machines Corporationi filed Critical Int Business Machines Corporationi
Publication of MX2021014838A publication Critical patent/MX2021014838A/es
Publication of MX393336B publication Critical patent/MX393336B/es

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00Superconducting devices
    • H10N60/01Manufacture or treatment
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G06N10/40Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • H05K1/112Pads for surface mounting, e.g. lay-out directly combined with via connections
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00Superconducting devices
    • H10N60/01Manufacture or treatment
    • H10N60/0912Manufacture or treatment of Josephson-effect devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00Superconducting devices
    • H10N60/10Junction-based devices
    • H10N60/11Single-electron tunnelling devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00Superconducting devices
    • H10N60/10Junction-based devices
    • H10N60/12Josephson-effect devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00Superconducting devices
    • H10N60/80Constructional details
    • H10N60/81Containers; Mountings
    • H10N60/815Containers; Mountings for Josephson-effect devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N69/00Integrated devices, or assemblies of multiple devices, comprising at least one superconducting element covered by group H10N60/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Data Mining & Analysis (AREA)
  • Computing Systems (AREA)
  • Evolutionary Computation (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • Artificial Intelligence (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Superconductor Devices And Manufacturing Methods Thereof (AREA)
  • Wire Bonding (AREA)

Abstract

Se forma un dispositivo informático cuántico (300) utilizando un primer chip (302) y un segundo chip (306), el primer chip tiene un primer sustrato (303), un primer conjunto de almohadillas (312 A,B), y un conjunto de uniones de Josephson (304) colocadas en el primer sustrato. El segundo chip tiene un segundo sustrato (307), un segundo conjunto de almohadillas (308) colocadas en el segundo sustrato opuesto al primer conjunto de almohadillas, y una segunda capa (310 A, B) formada en un subconjunto del segundo conjunto de almohadillas. La segunda capa está configurada para unir el primer chip y el segundo chip. El subconjunto del segundo conjunto de almohadillas corresponde a un subconjunto del conjunto de uniones de Josephson seleccionadas para evitar la colisión de frecuencia entre los qubits en un conjunto de qubits. Un qubit se forma utilizando una unión de Josephson del subconjunto de uniones de Josephson y otra unión de Josephson no en el subconjunto que se hace inutilizable para formar los qubits.
MX2021014838A 2019-06-19 2020-06-15 Fabricacion de estructuras de chip invertido transmon qubit para dispositivos informaticos cuanticos MX393336B (es)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US16/445,764 US10944039B2 (en) 2019-06-19 2019-06-19 Fabricating transmon qubit flip-chip structures for quantum computing devices
PCT/EP2020/066437 WO2020254226A1 (en) 2019-06-19 2020-06-15 Fabricating transmon qubit flip-chip structures for quantum computing devices

Publications (2)

Publication Number Publication Date
MX2021014838A MX2021014838A (es) 2022-06-23
MX393336B true MX393336B (es) 2025-03-24

Family

ID=71108573

Family Applications (1)

Application Number Title Priority Date Filing Date
MX2021014838A MX393336B (es) 2019-06-19 2020-06-15 Fabricacion de estructuras de chip invertido transmon qubit para dispositivos informaticos cuanticos

Country Status (11)

Country Link
US (2) US10944039B2 (es)
EP (1) EP3987576B1 (es)
JP (1) JP7479394B2 (es)
KR (1) KR102551939B1 (es)
CN (1) CN113853618B (es)
AU (1) AU2020296882B2 (es)
CA (1) CA3143396A1 (es)
IL (1) IL288976B2 (es)
MX (1) MX393336B (es)
SG (1) SG11202110352VA (es)
WO (1) WO2020254226A1 (es)

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* Cited by examiner, † Cited by third party
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EP4053865B1 (en) * 2021-03-02 2024-04-24 Imec VZW Trench capacitor device for a superconducting electronic circuit, superconducting qubit device and method for forming a trench capacitor device for a qubit device
CN115701272B (zh) * 2021-07-30 2025-08-08 本源量子计算科技(合肥)股份有限公司 一种量子芯片及其制备方法、一种量子计算机
CN116263474B (zh) * 2021-12-13 2025-07-15 本源量子计算科技(合肥)股份有限公司 探针装置、超导量子比特结电阻测量系统及方法
WO2023152961A1 (ja) 2022-02-14 2023-08-17 富士通株式会社 電子装置及び電子装置の製造方法
US20230394345A1 (en) * 2022-05-09 2023-12-07 International Business Machines Corporation Qubit coupling over distance with multi-mode buses

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JPS58207686A (ja) * 1982-05-28 1983-12-03 Nippon Telegr & Teleph Corp <Ntt> 低温デバイスの超伝導接続方法
WO2017015432A1 (en) * 2015-07-23 2017-01-26 Massachusetts Institute Of Technology Superconducting integrated circuit
US10134972B2 (en) * 2015-07-23 2018-11-20 Massachusetts Institute Of Technology Qubit and coupler circuit structures and coupling techniques
WO2017131831A2 (en) 2015-11-05 2017-08-03 Massachusetts Institute Of Technology Qubit and coupler circuit structures and coupling techniques
US10242968B2 (en) * 2015-11-05 2019-03-26 Massachusetts Institute Of Technology Interconnect structure and semiconductor structures for assembly of cryogenic electronic packages
JP6742433B2 (ja) 2015-12-15 2020-08-19 グーグル エルエルシー 超伝導バンプボンド
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WO2018169585A1 (en) * 2017-03-13 2018-09-20 Google Llc Integrating circuit elements in a stacked quantum computing device
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US10956828B2 (en) * 2019-06-19 2021-03-23 International Business Machines Corporation Transmon qubit flip-chip structures for quantum computing devices

Also Published As

Publication number Publication date
WO2020254226A1 (en) 2020-12-24
IL288976B2 (en) 2024-06-01
US20210111329A1 (en) 2021-04-15
IL288976A (en) 2022-02-01
CN113853618A (zh) 2021-12-28
US20200403138A1 (en) 2020-12-24
AU2020296882A1 (en) 2021-10-14
US11489103B2 (en) 2022-11-01
EP3987576B1 (en) 2025-08-06
JP7479394B2 (ja) 2024-05-08
JP2022537094A (ja) 2022-08-24
EP3987576A1 (en) 2022-04-27
US10944039B2 (en) 2021-03-09
MX2021014838A (es) 2022-06-23
KR20220002559A (ko) 2022-01-06
EP3987576C0 (en) 2025-08-06
AU2020296882B2 (en) 2023-08-03
BR112021025721A2 (pt) 2022-02-08
CN113853618B (zh) 2025-12-05
SG11202110352VA (en) 2021-10-28
IL288976B1 (en) 2024-02-01
CA3143396A1 (en) 2020-12-24
KR102551939B1 (ko) 2023-07-06

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