MX371227B - Aparato de transmision y metodo de intercalacion del mismo. - Google Patents
Aparato de transmision y metodo de intercalacion del mismo.Info
- Publication number
- MX371227B MX371227B MX2018014570A MX2018014570A MX371227B MX 371227 B MX371227 B MX 371227B MX 2018014570 A MX2018014570 A MX 2018014570A MX 2018014570 A MX2018014570 A MX 2018014570A MX 371227 B MX371227 B MX 371227B
- Authority
- MX
- Mexico
- Prior art keywords
- transmitting apparatus
- ldpc
- map
- modulator
- parity check
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2792—Interleaver wherein interleaving is performed jointly with another technique such as puncturing, multiplexing or routing
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
- H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
- H03M13/2707—Simple row-column interleaver, i.e. pure block interleaving
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
- H03M13/271—Row-column interleaver with permutations, e.g. block interleaving with inter-row, inter-column, intra-row or intra-column permutations
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2778—Interleaver using block-wise interleaving, e.g. the interleaving matrix is sub-divided into sub-matrices and the permutation is performed in blocks of sub-matrices
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/35—Unequal or adaptive error protection, e.g. by providing a different level of protection according to significance of source information or by adapting the coding according to the change of transmission channel characteristics
- H03M13/356—Unequal error protection [UEP]
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6522—Intended application, e.g. transmission or communication standard
- H03M13/6538—ATSC VBS systems
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6522—Intended application, e.g. transmission or communication standard
- H03M13/6552—DVB-T2
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6522—Intended application, e.g. transmission or communication standard
- H03M13/6555—DVB-C2
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
- H04L1/0058—Block-coded modulation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0071—Use of interleaving
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
- H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Mathematical Physics (AREA)
- Multimedia (AREA)
- Error Detection And Correction (AREA)
Abstract
Se proporciona un aparato de transmisión. El aparato de transmisión incluye: un codificador configurado para generar una contraseña de comprobación de paridad de baja densidad (LDPC) por medio de codificación por LDPC en base a una matriz de comprobación de paridad; un intercalador configurado para intercalar la contraseña LDPC; y un modulador configurado para mapear la contraseña LDPC intercalada 5 en un símbolo de modulación, en donde el modulador es además configurado para mapear un bit incluido en un grupo de bits predeterminado de entre una pluralidad de grupos de bits que constituye la contraseña LDPC en un bit predeterminado del símbolo de modulación.
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201461941676P | 2014-02-19 | 2014-02-19 | |
US201462001170P | 2014-05-21 | 2014-05-21 | |
KR1020150000671A KR101776275B1 (ko) | 2014-02-19 | 2015-01-05 | 송신 장치 및 그의 인터리빙 방법 |
PCT/KR2015/001694 WO2015126193A1 (en) | 2014-02-19 | 2015-02-23 | Transmitting apparatus and interleaving method thereof |
Publications (1)
Publication Number | Publication Date |
---|---|
MX371227B true MX371227B (es) | 2020-01-10 |
Family
ID=54059693
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MX2016010776A MX361269B (es) | 2014-02-19 | 2015-02-23 | Aparato de transmision y metodo de intercalacion del mismo. |
MX2018014570A MX371227B (es) | 2014-02-19 | 2015-02-23 | Aparato de transmision y metodo de intercalacion del mismo. |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MX2016010776A MX361269B (es) | 2014-02-19 | 2015-02-23 | Aparato de transmision y metodo de intercalacion del mismo. |
Country Status (5)
Country | Link |
---|---|
US (2) | US11012096B2 (es) |
KR (6) | KR101776275B1 (es) |
CN (1) | CN106165303B (es) |
CA (3) | CA2940275C (es) |
MX (2) | MX361269B (es) |
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KR101776275B1 (ko) * | 2014-02-19 | 2017-09-07 | 삼성전자주식회사 | 송신 장치 및 그의 인터리빙 방법 |
KR101800409B1 (ko) * | 2014-02-19 | 2017-11-23 | 삼성전자주식회사 | 송신 장치 및 그의 인터리빙 방법 |
US10425110B2 (en) | 2014-02-19 | 2019-09-24 | Samsung Electronics Co., Ltd. | Transmitting apparatus and interleaving method thereof |
MX2016000453A (es) * | 2014-05-21 | 2016-08-12 | Sony Corp | Dispositivo de procesamiento de datos y metodos de procesamiento de datos. |
CA2864647C (en) | 2014-08-14 | 2017-04-25 | Sung-Ik Park | Low density parity check encoder having length of 16200 and code rate of 4/15, and low density parity check encoding method using the same |
US9496896B2 (en) | 2014-08-14 | 2016-11-15 | Electronics And Telecommunications Research Institute | Low density parity check encoder having length of 64800 and code rate of 5/15, and low density parity check encoding method using the same |
CA2864630C (en) | 2014-08-14 | 2017-05-30 | Electronics And Telecommunications Research Institute | Low density parity check encoder having length of 64800 and code rate of 4/15, and low density parity check encoding method using the same |
US9602243B2 (en) | 2014-08-26 | 2017-03-21 | Electronics And Telecommunications Research Institute | Low density parity check encoder, and low density parity check encoding method using the same |
KR102616481B1 (ko) * | 2016-04-04 | 2023-12-21 | 삼성전자주식회사 | 수신 장치 및 그의 신호 처리 방법 |
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KR102547369B1 (ko) * | 2016-05-18 | 2023-06-23 | 삼성전자주식회사 | 수신 장치 및 그의 디코딩 방법 |
US10432227B2 (en) | 2017-01-24 | 2019-10-01 | Mediatek Inc. | Location of interleaver with LDPC code |
US10630319B2 (en) * | 2017-01-24 | 2020-04-21 | Mediatek Inc. | Structure of interleaver with LDPC code |
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KR101776275B1 (ko) * | 2014-02-19 | 2017-09-07 | 삼성전자주식회사 | 송신 장치 및 그의 인터리빙 방법 |
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2015
- 2015-01-05 KR KR1020150000671A patent/KR101776275B1/ko active IP Right Grant
- 2015-02-23 CN CN201580009606.4A patent/CN106165303B/zh active Active
- 2015-02-23 CA CA2940275A patent/CA2940275C/en active Active
- 2015-02-23 MX MX2016010776A patent/MX361269B/es active IP Right Grant
- 2015-02-23 CA CA3064131A patent/CA3064131C/en active Active
- 2015-02-23 MX MX2018014570A patent/MX371227B/es unknown
- 2015-02-23 CA CA3013975A patent/CA3013975C/en active Active
-
2017
- 2017-04-28 KR KR1020170055591A patent/KR101776279B1/ko active IP Right Grant
- 2017-09-01 KR KR1020170112119A patent/KR101965383B1/ko active IP Right Grant
-
2019
- 2019-03-28 KR KR1020190036169A patent/KR102014905B1/ko active IP Right Grant
- 2019-07-08 US US16/505,226 patent/US11012096B2/en active Active
- 2019-08-21 KR KR1020190102326A patent/KR102116088B1/ko active IP Right Grant
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2020
- 2020-05-21 KR KR1020200061157A patent/KR102329780B1/ko active IP Right Grant
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2021
- 2021-04-15 US US17/231,571 patent/US11563448B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
CN106165303A (zh) | 2016-11-23 |
CA3013975C (en) | 2020-02-18 |
KR101776279B1 (ko) | 2017-09-07 |
US20190334556A1 (en) | 2019-10-31 |
US20210242887A1 (en) | 2021-08-05 |
KR20200058374A (ko) | 2020-05-27 |
KR101965383B1 (ko) | 2019-04-03 |
CN106165303B (zh) | 2019-12-20 |
CA2940275A1 (en) | 2015-08-27 |
KR20170104135A (ko) | 2017-09-14 |
CA3064131C (en) | 2021-09-07 |
CA3013975A1 (en) | 2015-08-27 |
KR102116088B1 (ko) | 2020-05-27 |
KR20150098185A (ko) | 2015-08-27 |
MX361269B (es) | 2018-12-03 |
KR20170053166A (ko) | 2017-05-15 |
KR102329780B1 (ko) | 2021-11-23 |
KR101776275B1 (ko) | 2017-09-07 |
KR20190038511A (ko) | 2019-04-08 |
MX2016010776A (es) | 2016-11-08 |
CA3064131A1 (en) | 2015-08-27 |
KR20190101341A (ko) | 2019-08-30 |
KR102014905B1 (ko) | 2019-08-28 |
US11012096B2 (en) | 2021-05-18 |
US11563448B2 (en) | 2023-01-24 |
CA2940275C (en) | 2018-09-25 |
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