KR980011937A - Contact formation method - Google Patents

Abstract

In particular, the present invention relates to a method of easily forming a contact by depositing a material for forming a storage node electrode in a contact hole between a substrate and a data line during a cell manufacturing process. According to another aspect of the present invention, there is provided a method of forming a contact, comprising: forming a plurality of gate electrodes having a gate insulating film and a sidewall insulating film on a substrate having an isolation region; Forming a first insulating layer to surround the gate electrode; Depositing a storage node electrode having a plurality of FIN structures between the plurality of gate electrodes and a material for forming a storage node electrode in a data line contact forming portion; Forming a dielectric layer on the plate electrode to surround the storage node electrode; Depositing a second insulating layer on the front surface to form a data line contact hole by etching the second insulating layer and the dielectric layer in the data line contact forming region; And forming a conductive material for forming a data line on the front surface.

Description

Contact formation method

In particular, the present invention relates to a method of easily forming a contact by depositing a material for forming a storage node electrode in a contact hole between a substrate and a data line during a cell manufacturing process.

Hereinafter, a conventional method of forming a contact will be described with reference to the accompanying drawings.

First, as shown in FIG. 1A, an oxide film is deposited on the entire surface of the substrate 1 to separate an active region on the substrate 1, a photoresist film is coated, and the photoresist film is selectively removed by an exposure and development process. After the oxide film is patterned using a mask, a field oxide film 2 is formed through a thermal process. Then, an oxide film is deposited on the entire surface of the substrate 1, a polysilicon layer or a conductive layer is deposited, a photosensitive film is coated, and the photosensitive film is selectively removed by an exposure and development process. Then, the polysilicon layer and the oxide film are removed using the photoresist film remaining as a mask to form the gate electrode 4 and the gate oxide film 3. Impurity ions are implanted into the exposed substrate 1 on both sides of the gate electrode 4 to form an impurity region 5. Then, an insulating film is deposited on the entire surface and anisotropically etched to form a gate sidewall insulating film 6 on both sides of the gate electrode 4, followed by depositing a first insulating film 7 on the entire surface.

Next, as shown in FIG. 1B, a photoresist film is coated on the entire surface of the first insulating film 7 and only the photoresist film between the gate electrodes 4 to be formed by the exposure and development process is removed. Then, The first insulating film 7 is removed.

Then, as shown in FIG. 1C, a first polysilicon layer 8 to be used as a storage node electrode is deposited and a first insulating film 9 is deposited on the entire surface of the first polysilicon layer 8. Then, as shown in FIG. 1D, the photoresist film is coated on the entire surface and the photoresist film between the gate electrodes 4 for selectively forming a capacitor by the exposure and development processes is removed, and the remaining photoresist film is used as a mask to form a first insulating film 9) is removed. And a second polysilicon layer 10 is deposited on the entire surface.

Next, as shown in FIG. 1E, a photoresist film is coated on the entire surface, and the photoresist film is removed by selectively removing the photoresist film only on the upper surface of the area where the capacitor is to be formed, 10, the second insulating layer 9 and the first polysilicon layer 8 are anisotropically etched, and then the first insulating layer 7 is isotropically etched to form a storage node electrode having a 2-FIN structure. A third polysilicon layer 12 is deposited on the third polysilicon layer 12 for use as a plate electrode, and a photoresist film is applied on the third polysilicon layer 12 to expose the gate electrode 4 ) Of the third polysilicon layer 12 on the storage node of the 2-FIN structure. Then, the third polysilicon layer 12 and the dielectric film 11 are removed by using the remaining photoresist as a mask.

Next, as shown in FIG. 1F, a third insulating film 13 is deposited on the entire surface. Next, as shown in FIG. 1G, a photoresist film is coated on the entire surface, and then only the photoresist film between the gate electrodes 4 for forming the data line contact holes in the exposure and development process is removed, and the remaining photoresist film is used as a mask, The insulating film 13 and the first insulating film are sequentially removed. After the fourth polysilicon layer 14 is deposited on the entire surface, the fourth polysilicon layer 14 is etched back so that the fourth polysilicon layer 14 remains only in the data line contact hole region. A conductive layer 15 is then deposited to contact the fourth polysilicon layer 14 and to be in contact with the substrate 1 to form a data line.

In the conventional method of forming a contact, it is difficult to form a data line by depositing a conductive layer immediately after formation of a data line contact hole to form a data line, thereby making contact with the substrate 1. Therefore, There is a problem that the process is complicated and the productivity is lowered.

SUMMARY OF THE INVENTION The present invention has been made in order to solve the above problems, and it is an object of the present invention to improve the reliability of a contact by reducing the depth of a contact hole between a data line and a substrate and to simplify a process step for forming a contact of a data line, And the like.

Figure 1 shows a cross-sectional view of a process,

Figure 2 is a process cross-sectional view illustrating contact formation of the present invention

DESCRIPTION OF THE REFERENCE NUMERALS

20: substrate 21: field oxide film

22: gate oxide film 23: gate electrode

24: impurity region 25: gate sidewall insulating film

26: first insulating film 27: first polysilicon layer

28: second insulating film 29: second polysilicon layer

30: Dielectric film 31: Third polysilicon layer

32: third insulating film 33: data line layer

The method includes forming a plurality of gate electrodes having a gate insulating film and a sidewall insulating film on a substrate having an isolation region; Forming a first insulating layer to surround the gate electrode; Depositing a storage node electrode having a plurality of FIN structures between the plurality of gate electrodes and a material for forming a storage node electrode in a data line contact forming portion; Forming a dielectric layer on the plate electrode to surround the storage node electrode; Depositing a second insulating layer on the front surface to form a data line contact hole by etching the second insulating layer and the dielectric layer in the data line contact forming region; And forming a conductive material for forming a data line on the front surface.

Hereinafter, a contact forming method of the present invention will be described with reference to the accompanying drawings.

First, as shown in FIG. 2A, an oxide film is deposited on the entire surface of the substrate 20 to separate active regions on the substrate 20, and a photoresist film is applied to selectively expose the photoresist film by an exposure and development process. Then, the oxide film is patterned using the photoresist film remaining as a mask, and then the field oxide film 21 is formed through a thermal process. Then, an oxide film is deposited on the entire surface of the substrate 20, a polysilicon layer or a conductive layer is deposited on the oxide film, and a photosensitive film is coated to selectively remove the photosensitive film by exposure and development processes. Then, the polysilicon layer and the oxide film are removed by using the remaining photoresist film as a mask to form the gate electrode 23 and the gate oxide film 22. Then, impurity ions are implanted into the exposed substrate 20 on both sides of the gate electrode 23 to form an impurity region 24. Then, an insulating film is deposited on the entire surface and anisotropically etched to form a gate sidewall insulating film 25 on both sides of the gate electrode 23, and then a gate first insulating film 26 is deposited on the entire surface.

Next, as shown in FIG. 2B, the photoresist is coated on the entire surface of the first insulating layer, and the photoresist layer is selectively removed by an exposure and development process so as to remain only on the gate electrode 23 and the gate sidewall insulation layer 25, The first insulating film 26 between the gate electrodes 23 is removed by using as a mask. A first polysilicon layer 27 is deposited on the second polysilicon layer 27 as a storage node electrode on the front side and a second insulation film 28 is deposited on the second polysilicon layer 27.

Next, as shown in FIG. 2D, the second polysilicon layer 29, the second insulating film 28, and the first polysilicon layer 27 are anisotropically etched using the photoresist film remaining in FIG. 2C as a mask, The insulating film 26 is isotropically etched to form a 2-FIN structure. Then, a third polysilicon layer 31 for use as a dielectric layer 30 and a plate electrode is deposited on the entire surface, and a photoresist is coated thereon. Thereafter, the photolithography process is performed so that the photoresist film remains only on the upper portion of the third polysilicon layer 31 having the 2-FIN structure located between the gate electrodes 23 and the gate electrode 23 forming the data line contact. . Then, the third polysilicon layer 31 and the dielectric layer 30 are removed by using the remaining photoresist as a mask.

Next, as shown in FIG. 2E, a third insulating film 32 is deposited on the entire surface, and a photoresist film is applied on the third insulating film 32 to expose the photoresist film only for the data line contact formation. (32) and the dielectric film (30) are removed to form a data line contact hole. The data line layer 33 is formed on the contact hole forming portion to form the data line layer 33 together with the first polysilicon layer 27 and the second polysilicon layer 29 used as storage node electrodes. (20).

The contact forming method of the present invention can reduce the depth of the contact hole of the data line when the storage node material is deposited in the data line contact forming region when forming the storage node, It is possible to simplify the process by depositing the data line layer directly on the substrate 20 and making contact with the substrate 20.

Claims (1)

(1) forming a plurality of gate electrodes having a gate insulating film and a sidewall insulating film on a substrate having an isolation region; (2) forming a first insulating film so as to surround the gate electrode; (3) depositing a material for forming a storage node electrode having a plurality of FIN structures between the plurality of gate electrodes and a material for forming a storage node electrode in a data line contact forming portion; (4) forming a plate electrode on the dielectric film so as to surround the storage node electrodes; (5) depositing a second insulating film on the front surface to form a data line contact hole by etching the second insulating film and the dielectric film in the data line contact forming region; (6) depositing a conductive material for forming a data line on the front surface. ※ Note: It is disclosed by the contents of the first application.