KR100338095B1 - Method for forming contact hole in semiconductor device - Google Patents

Abstract

PURPOSE: A method for forming a contact hole in a semiconductor device is provided to be capable of preventing the damage of a gate electrode and increasing processing margins. CONSTITUTION: A plurality of gate electrodes(12) is formed on a silicon substrate(11). An oxide spacer(13) is formed at both sidewalls of the gate electrodes, and a junction region is formed in the silicon substrate. After forming a thermal oxide layer(18) by thermal oxidation processing, an IPO layer(14) and a BPSG layer(15) are sequentially formed on the resultant structure. A contact hole(17) is then formed to expose the junction region by etching the BPSG layer, the IPO layer and the thermal oxide layer using a photoresist pattern as a mask.

Description

Contact hole formation method of semiconductor device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a contact hole in a semiconductor device, and in particular, by growing a thermal oxide film on a silicon substrate on which a gate electrode is formed, by using a difference in growth thickness of the thermal oxide film formed on a silicon substrate and a polysilicon gate electrode. BACKGROUND OF THE INVENTION A semiconductor device capable of forming contact holes even between gate electrodes without damaging the gate electrodes relates to a method of forming a contact hole.

In general, a method of forming a contact hole in a narrow space between gate electrodes in the related art will be described with reference to FIGS. 1A to 1E.

Referring to FIG. 1A, a polysilicon layer 2 is formed on the silicon substrate 1 to a thickness of 500 to 2000 kPa. After the polysilicon layer 2 is patterned to form the gate electrode 9, an oxide spacer 3 is formed on the sidewall of the gate electrode 9. An impurity ion implantation process is then performed to form a junction region (not shown) on the silicon substrate 1.

FIG. 1B is a cross-sectional view of the IPO film 4 and the BPSG film 5 deposited with an interlayer insulating film over the entire structure.

1C is a cross-sectional view of the photoresist 6 applied over the entire structure and then patterned by a lithography process using a contact mask.

Referring to FIG. 1D, the BPSG film 5 and the IPO film 4 are etched using the patterned photoresist 6 as a mask to form a contact hole 7 exposing a junction region (not shown). However, the oxide spacer 3 formed on the sidewall of the gate electrode 9 is etched due to the narrow gap between the gate electrodes and the like to expose a part of the polysilicon layer 2.

In FIG. 1E, an oxide layer is deposited on the entire structure where the contact hole 7 is formed, and then an etching process is performed to form the contact oxide spacer 8 in the contact hole 7.

If the contact holes are formed between the gate electrodes maintaining a narrow gap as described above, since the oxide spacer is also a deposited oxide film when the interlayer insulating film is etched, the etching selectivity between the IPO film and the BPSG film is low, thereby partially exposing the gate electrode during the etching process. . When the gate electrode is exposed, it is contaminated by atoms and ions generated during etching, thereby degrading characteristics and reliability of the device.

Accordingly, an object of the present invention is to provide a method for manufacturing a contact hole in a semiconductor device capable of forming a contact hole so that the gate electrode is not exposed and damaged between gate electrodes maintaining a narrow gap.

According to an aspect of the present invention, a polysilicon film is formed on a silicon substrate and then patterned to form a plurality of gate electrodes, and an oxide spacer is formed on the sidewalls of the gate electrode to form a junction region on the silicon substrate. Forming a thermal oxide film on the entire structure by performing a thermal oxidation process, and then forming an IPO film and a BPSG film on the entire structure, and applying a photoresist on the entire structure, using a contact mask. Patterning the photoresist by a lithography process, and etching the BPSG film, the IPO film, and the thermal oxide film using the patterned photoresist as a mask to form a contact hole exposing a junction region between gate electrodes. It features.

Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.

2A to 2E are cross-sectional views of devices sequentially shown to explain a method for forming a contact hole in a semiconductor device according to the present invention.

Referring to FIG. 2A, a polysilicon layer 12 is formed on the silicon substrate 11 to a thickness of 2000 to 5000 kPa. The polysilicon layer 12 is patterned to form a plurality of gate electrodes 19, and then oxide spacers 13 are formed on sidewalls of the gate electrodes 19. An impurity ion implantation process is then performed to form a junction region (not shown) on the silicon substrate 11.

Referring to FIG. 2B, a thermal oxidation process is performed to form a thermal oxidation film 18 on the entire structure at a thickness of about 200 to 5000 kPa. At this time, since the thermal oxide film 18 has a growth rate of about 2: 1 higher than that of the silicon substrate 11 on the polysilicon layer 12, the thickness of the thermal oxide film 18 grown on the polysilicon layer 12. (A) is formed thicker than the thickness B of the thermal oxide film 18 grown on the silicon substrate 11.

2C is a cross-sectional view of the IPO film 14 and the BPSG film 15 formed as interlayer insulating films on the entire structure.

Referring to FIG. 2D, a cross-sectional view of the photoresist 16 applied over the entire structure and then patterned by a lithography process using a contact mask, and the gate electrode 19 formed of the polysilicon layer 12 having a narrow spacing therebetween. Patterned to expose the junction region (not shown).

Referring to FIG. 2E, a contact hole 17 exposing a junction region (not shown) between the gate electrodes 19 formed of the polysilicon layer 12 by performing an etching process using the patterned photoresist 16 as a mask. ). In this case, the contact hole 17 is formed by performing an etching process in consideration of the thickness of the thermal oxide film 18 and the interlayer insulating film formed on the silicon substrate 11. In this case, since the thermal oxide film 18 is formed thicker than the upper portion of the silicon substrate 11 on the polysilicon layer 12, a part of the polysilicon layer 12 is not exposed during the etching process.

As described above, according to the present invention, since a contact hole can be formed between the gate electrodes maintaining a narrow gap without damaging the gate electrodes, process margins can be increased, and device characteristics and reliability can be improved.

1A to 1E are cross-sectional views of devices sequentially shown to explain a method for forming a contact hole in a conventional semiconductor device.

2A through 2E are cross-sectional views of devices sequentially shown to explain a method for forming a contact hole in a semiconductor device according to the present invention.

<Explanation of symbols for the main parts of the drawings>

1 and 11: silicon substrate 2 and 12: polysilicon layer

3 and 13: oxide film spacer 4 and 14: IPO film

5 and 15 BPSG films 6 and 16 photoresist

7 and 17: contact hole 8: contact oxide spacer

18: thermal oxide film 9 and 19: gate electrode

Claims (3)

In the method of forming a contact hole of a semiconductor device, Forming a polysilicon film on the silicon substrate and then patterning to form a plurality of gate electrodes; Forming an oxide spacer on sidewalls of the gate electrode and then forming a junction region on the silicon substrate; Performing a thermal oxidation process to form a thermal oxide film on the entire structure, and then forming an IPO film and a BPSG film on the entire structure; Applying a photoresist over the entire structure and patterning the photoresist by a lithography process using a contact mask; And forming a contact hole exposing the junction region between the gate electrode by etching the BPSG film, the IPO film, and the thermal oxide film using the patterned photoresist as a mask. The method of claim 1, The polysilicon layer is a contact hole forming method of a semiconductor device, characterized in that formed in a thickness of 2000 to 5000Å. The method of claim 1, The thermal oxide film is formed to a thickness of 200 to 5000Å, the contact hole forming method of the semiconductor device, characterized in that formed on the polysilicon gate electrode thicker than the upper silicon substrate.