KR970077397A - 혼성집적회로 및 그 제조방법 - Google Patents

혼성집적회로 및 그 제조방법 Download PDF

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Publication number
KR970077397A
KR970077397A KR1019970000692A KR19970000692A KR970077397A KR 970077397 A KR970077397 A KR 970077397A KR 1019970000692 A KR1019970000692 A KR 1019970000692A KR 19970000692 A KR19970000692 A KR 19970000692A KR 970077397 A KR970077397 A KR 970077397A
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South Korea
Prior art keywords
heat sink
solder
mounting portion
layer
power device
Prior art date
Application number
KR1019970000692A
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English (en)
Inventor
에이지 코바야시
Original Assignee
기다오까 다까시
미쓰비시 뎅끼 가부시끼가이샤
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Application filed by 기다오까 다까시, 미쓰비시 뎅끼 가부시끼가이샤 filed Critical 기다오까 다까시
Publication of KR970077397A publication Critical patent/KR970077397A/ko

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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954—Other details of electrical connections
    • H05K2201/10969—Metallic case or integral heatsink of component electrically connected to a pad on PCB
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954—Other details of electrical connections
    • H05K2201/10992—Using different connection materials, e.g. different solders, for the same connection
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04—Soldering or other types of metallurgic bonding
    • H05K2203/041—Solder preforms in the shape of solder balls
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Abstract

판이 설치되어 있다.
방열판에서 기판으로 열전달을 방지하는 스페이서로서, 땜납층은 (1) 균일하게 분포혼성집적회로에는 스페이서를 통해서 표면에 고정된 파워 디바이스를 가지는 방열판 직경 80-200㎛의 금속구와, (2) 방열판의 하면상에 도포된 50-200㎛ 두께의 제1의 땜납층과, (3) 방열판 탑재부상에 인쇄법에 의해 저항층, 도체층 및 유리층으로 구성되어 있는 그룹으로부터 선택된 적어도 하나의 층을 포함하는 두께 80-150㎛의 더미층으로 구성되어 있는 그룹으로부터 선택된 적어도 하나의 지지수단을 가진다.

Description

혼성집적회로 및 그 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1a도, 제1b도, 제1c도, 제1d도 및 제1e도는 본 발명의 제1의 실시의 형태에 따른 혼성집적회로의 각 제조공정을 나타내는 단면도.

Claims (4)

  1. 파워 디바이스를 상면에 고정한 파워 디바이스의 방열판을, 땜납층을 통해서 후막기판상의 방열판 탑재부에 적층하여 고정한 혼성집적회로에 있어서, 상기 땜납층은 상기 방열판과 방열판 탑재부와의 사이의 스페이서로서 (1) 땜납재보다 융점이 높고, 직경이 80-200㎛로, 균일하게 분포된 복수의 금속구, (2) 방열판 탑재부상에 형성된 저융점 땜납층상에 적층 형성된 막 두께 50-200㎛의 고융점 땜납층, 또한 (3) 후막기판상의 방열판 탑재부와 파워 디바이스의 방열판과의 사이에 저항층, 도체층, 유리층내의 1 또는 2 이상의 선택된 층으로 부터 적층형성되고, 높이가 80-150㎛인 더미층을 포함하는 것을 특징으로 하는 혼성집적회로.
  2. 구형의 땜납재보다 융점이 높고, 직경이 80-200㎛인 복수의 금속구를 상기 구형의 땜납재중에 균일하게 분포시키고, 플럭스제와 혼합하여 형성된 땜납 페이스트를 후막기판상의 방열판 탑재부에 도포하는 공정과; 상면에 파워 디바이스를 고정한 파워 디바이스의 방열판을 땜납 페이스트상에 배치하는 공정과; 후막기판을 승온하여 땜납 페이스트중의 땜납재를 용융하고, 방열판 탑재부와 방열판의 사이에 스페이서로서 상기 금속구가 있도록 방열판 탑재부상에 방열판을 고정하는 공정을 포함하는 것을 특징으로 하는 혼성집적회로의 제조방법.
  3. 파워 디바이스를 상면에 고정한 파워 디바이스의 방열판을 후막기판상의 방열판 탑재부에 적층하여 고정하도록 땜납층을 형성하는 페이스트에 있어서, 구형의 땜납재와, 상기 땜납재보다 융점이 높고, 직경이 80-200㎛인 복수의 금속구와, 플럭스제를 필수성분으로 함유하고, 균일하게 혼합되어 이루어지는 것을 특징으로 하는 땜납 페이스트.
  4. 방열판 표면에 제1의 땜납재를 포함하는 제1의 땜납페이스트를 도포하고, 해당 제1의 땜납 페이스트상에 파워디바이스를 배치함과 동시에, 방열판 이면에도 제1의 땜납 페이스트를 도포하는 공정과, 방열판을 승온하여, 방열판 표면에 파워디바이스를 고정함과 동시에, 방열판 이면에 방열판 탑재부와 방열판 사이에서 스페이서로서 기능하는 막 두께가 50∼200㎛인 제1의 땜납층을 형성하는 공정과, 후막기판상의 방열판 탑재부에 상기 제1의 땜납재보다 융점이 낮은 제2의 땜납제를 포함하는 제2의 땜납페이스트를 도포하는 공정과, 방열판 이면의 제1의 땜납층이 방열판 탑재부에 도포된 제2의 땜납페이스트에 접하도록, 방열판을 배치하는 공정과, 제2의 땜납재는 용융하지만, 제1의 땜납재는 용융하지 않는 온도로 후막기판을 승온하여, 방열판 탑재부상에 방열판을 고정하는 공정을 포함하는 것을 특징으로 하는 혼성집적회로의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019970000692A 1996-05-27 1997-01-13 혼성집적회로 및 그 제조방법 KR970077397A (ko)

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JP131995 1996-05-27
JP8131995A JPH09321187A (ja) 1996-05-27 1996-05-27 混成集積回路の製造方法およびその構造

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JP4366700B2 (ja) * 1998-10-05 2009-11-18 富士電機デバイステクノロジー株式会社 半導体素子のパッケージの製造方法
EP0999728A1 (en) 1998-11-04 2000-05-10 TELEFONAKTIEBOLAGET L M ERICSSON (publ) An electrical component and an electrical circuit module having connected ground planes
US20040134976A1 (en) * 2003-01-14 2004-07-15 Frank Keyser Method and system for solder connecting electrical devices
US7179558B2 (en) * 2004-07-15 2007-02-20 Delphi Technologies, Inc. Braze alloy containing particulate material
US7405093B2 (en) * 2004-08-18 2008-07-29 Cree, Inc. Methods of assembly for a semiconductor light emitting device package
EP1936683A1 (en) * 2006-12-22 2008-06-25 ABB Technology AG Base plate for a heat sink and electronic device with a base plate
JP5140411B2 (ja) * 2007-12-27 2013-02-06 ローム株式会社 半導体装置

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