KR970077331A - Interlayer insulating film formation method of semiconductor device - Google Patents
Interlayer insulating film formation method of semiconductor device Download PDFInfo
- Publication number
- KR970077331A KR970077331A KR1019960018233A KR19960018233A KR970077331A KR 970077331 A KR970077331 A KR 970077331A KR 1019960018233 A KR1019960018233 A KR 1019960018233A KR 19960018233 A KR19960018233 A KR 19960018233A KR 970077331 A KR970077331 A KR 970077331A
- Authority
- KR
- South Korea
- Prior art keywords
- forming
- capping layer
- resultant
- film
- interlayer insulating
- Prior art date
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Abstract
본 발명은 반도체 장치의 층간 절연막 형성 방법에 관한 것으로, 본 발명에 의한 방법에서는 소정의 갭을 사이에 두고 패턴이 형성된 반도체 기판상에 산화막으로 이루어지는 캡핑층을 형성하는 단계와, 상기 결과물에 대하여 Ar 가스를 이용한 플라즈마 식각을 행하여 모서리 부분의 개방 폭이 확장되도록 변형된 캡핑층을 형성하는 단계와, 상기 결과물상에 USG 막을 증착하는 단계를 포함한다. 본 발명에 의하면, USG막을 층간 절연막으로 사용할 때, 반도체 기판상의 패턴 사이에 형성된 갭 부분에서 보이드가 형성되지 않도록 상기 갭을 채우는 효과를 향상시킬 수 있다.The present invention relates to a method for forming an interlayer insulating film of a semiconductor device. The method according to the present invention comprises the steps of: forming a capping layer of an oxide film on a patterned semiconductor substrate with a predetermined gap therebetween; Plasma etching using gas to form a capping layer that is modified to expand the open width of the edge portion, and depositing a USG film on the resultant. According to the present invention, when the USG film is used as an interlayer insulating film, it is possible to improve the effect of filling the gap so that no void is formed in the gap portion formed between the patterns on the semiconductor substrate.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제1a도 및 제1b도는 본 발명의 제1실시예에 따른 반도체 장치의 층간 절연막 형성 방법을 설명하기 위한 도면이다.1A and 1B are diagrams for describing a method of forming an interlayer insulating film of a semiconductor device according to a first embodiment of the present invention.
Claims (3)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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KR1019960018233A KR970077331A (en) | 1996-05-28 | 1996-05-28 | Interlayer insulating film formation method of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019960018233A KR970077331A (en) | 1996-05-28 | 1996-05-28 | Interlayer insulating film formation method of semiconductor device |
Publications (1)
Publication Number | Publication Date |
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KR970077331A true KR970077331A (en) | 1997-12-12 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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KR1019960018233A KR970077331A (en) | 1996-05-28 | 1996-05-28 | Interlayer insulating film formation method of semiconductor device |
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KR (1) | KR970077331A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100440264B1 (en) * | 1997-12-30 | 2004-09-18 | 주식회사 하이닉스반도체 | Method for fabricating semiconductor device to prevent lower metal interconnection from being physically etched when interlayer dielectric is deposited by high density plasma method |
KR100547242B1 (en) * | 1999-12-22 | 2006-02-01 | 주식회사 하이닉스반도체 | A method of forming intermetal dielectric layer for preventing void |
-
1996
- 1996-05-28 KR KR1019960018233A patent/KR970077331A/en not_active Application Discontinuation
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100440264B1 (en) * | 1997-12-30 | 2004-09-18 | 주식회사 하이닉스반도체 | Method for fabricating semiconductor device to prevent lower metal interconnection from being physically etched when interlayer dielectric is deposited by high density plasma method |
KR100547242B1 (en) * | 1999-12-22 | 2006-02-01 | 주식회사 하이닉스반도체 | A method of forming intermetal dielectric layer for preventing void |
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