KR970072417A

KR970072417A - Method for manufacturing capacitor of semiconductor device

Info

Publication number: KR970072417A
Application number: KR1019960012547A
Authority: KR
Inventors: 이주성; 박성준
Original assignee: 김광호; 삼성전자 주식회사
Priority date: 1996-04-24
Filing date: 1996-04-24
Publication date: 1997-11-07

Abstract

제조수율을 향상시킬 수 있는 반도체 장치의 커패시터 제조방법에 관하여 개시한다. 본 발명은 반도체 기판상에 평탄화 절연막을 형성하는 단계와, 상기 평탄화 절연막 상에 제1절연막 및 제2절연막을 형성하는 단계와, 상기 제2절연막, 제1절연막 및 평탄화절연막을 식각하여 상기 반도체 기판을 노출하는 콘택홀을 형성하는 단계와; 상기 콘택홀의 측벽에 스페이서를 형성하는 단계와, 상기 스페이서가 형성된 기판의 전면에 상기 콘택홀을 매립하도록 제1도전층을 형성하는 단계와, 상기 제1도전층을 패터닝하여 스토리지 전극을 형성하는 단계와, 상기 스토리지 전극의 형성되어 있는 제2절연막 및 제1절연막을 식각하는 단계와, 상기 스토리지 전극이 형성된 기판의 전면에 유전체막 및 플레이트 전극을 형성하는 단계를 포함한다. 본 발명의 커패시터 제조방법은 스페이서 형성 전에 실리콘 질화막을 형성함으로써 제조수율을 향상시킬 수 있다.A method of manufacturing a capacitor of a semiconductor device capable of improving a manufacturing yield is disclosed. The method includes forming a planarization insulating film on a semiconductor substrate, forming a first insulation film and a second insulation film on the planarization insulation film, etching the second insulation film, the first insulation film, and the planarization insulation film, Forming a contact hole to expose the contact hole; Forming a spacer on the sidewall of the contact hole; forming a first conductive layer on the entire surface of the substrate on which the spacer is formed to fill the contact hole; forming a storage electrode by patterning the first conductive layer Etching the second insulating layer and the first insulating layer on which the storage electrode is formed, and forming a dielectric layer and a plate electrode on the entire surface of the substrate on which the storage electrode is formed. The capacitor manufacturing method of the present invention can improve the production yield by forming a silicon nitride film before forming the spacer.

Description

Method for manufacturing capacitor of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is a trivial issue, I did not include the contents of the text.

제6도 내지 제7도는 본 발명에 따른 반도체 장치의 커패시터 제조방법을 나타낸 단면도들이다.6 to 7 are cross-sectional views illustrating a method of manufacturing a capacitor of a semiconductor device according to the present invention.

Claims

Forming a planarization insulating film on a semiconductor substrate; Forming a first insulating layer and a second insulating layer on the planarization insulating layer; Etching the second insulating layer, the first insulating layer, and the planarization insulating layer to form a contact hole exposing the semiconductor substrate; Forming a spacer on a sidewall of the contact hole; Forming a first conductive layer on the entire surface of the substrate on which the spacer is formed to fill the contact hole; Forming a storage electrode by patterning the first conductive layer; Etching the second insulating layer and the first insulating layer in which the storage electrode is formed; And forming a dielectric film and a plate electrode on the entire surface of the substrate having the storage electrode formed thereon.

The method of claim 1, wherein the first insulating film and the second insulating film are formed of a silicon oxide film and a silicon nitride film, respectively.

The method for manufacturing a capacitor of a semiconductor device according to claim 1, wherein the spacer is formed of a silicon nitride film.

※ Note: It is disclosed by the contents of the first application.