KR970071128A - Method for forming a high conductivity film pattern of a semiconductor device - Google Patents

Method for forming a high conductivity film pattern of a semiconductor device Download PDF

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Publication number
KR970071128A
KR970071128A KR1019960012545A KR19960012545A KR970071128A KR 970071128 A KR970071128 A KR 970071128A KR 1019960012545 A KR1019960012545 A KR 1019960012545A KR 19960012545 A KR19960012545 A KR 19960012545A KR 970071128 A KR970071128 A KR 970071128A
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KR
South Korea
Prior art keywords
forming
film
pattern
high conductivity
semiconductor device
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Application number
KR1019960012545A
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Korean (ko)
Inventor
정우영
김용진
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김광호
삼성전자 주식회사
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Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019960012545A priority Critical patent/KR970071128A/en
Publication of KR970071128A publication Critical patent/KR970071128A/en

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

알루미나를 식각용마스크로 이용하는 반도체 장치의 패턴형성방법에 관하여 개시한다. 본 발명은 반도체 기판 상에 고전도성막을 형성하는 단계와, 상기 고전도성막 상에 산화막을 형성하는 단계와, 상기 산화막 상에 알루미늄막을 형성하는 단계와, 상기 알루미늄막 상에 감광막 패턴을 형성하는 단계와, 상기 감광막 패턴을 마스크로 상기 알루미늄막을 식각하여 알루미늄막 패턴을 형성하는 단계와, 상기 알루미늄막 패턴의 표면을 산화시켜 식각마스크용 알루미나층을 형성하는 단계와, 상기 알루미나층을 이용하여 상기 산화막 및 고전도성막을 식각하여 산화막 패턴 및 고전도성막 패턴을 형성하는 단계를 포함하는 것을 특징으로 하는 반도체 장치의 고전도성막 패턴형성방법을 제공한다. 본 발명은 알루미나층을 식각마스크로 사용하여 고전도성막을 신뢰성있게 패터닝할 수 있다.A method of forming a pattern of a semiconductor device using alumina as an etching mask will be described. The present invention provides a method of manufacturing a semiconductor device, comprising: forming a high-conductivity film on a semiconductor substrate; forming an oxide film on the high-conductivity film; forming an aluminum film on the oxide film; Forming an aluminum film pattern by etching the aluminum film using the photoresist pattern as a mask; forming an alumina layer for an etching mask by oxidizing a surface of the aluminum film pattern; And a step of forming an oxide film pattern and a high conductivity film pattern by etching the oxide film and the high conductivity film to form a high conductivity film pattern of the semiconductor device. The present invention can reliably pattern a high conductivity film using an alumina layer as an etch mask.

Description

반도체 장치의 고전도성막 패턴형성방법Method for forming a high conductivity film pattern of a semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is a trivial issue, I did not include the contents of the text.

제4도는 본 발명의 의도 반도체 장치의 고전도성막 패턴형성방법을 설명하기 위하여 도시한 단도면이다.FIG. 4 is a step diagram showing a method for forming a high conductivity film pattern of an intentional semiconductor device according to the present invention.

Claims (2)

반도체 기판 상에 고전도성막을 형성하는 단계; 상기 고전도성막 상에 산화막을 형성하는 단계; 상기 산화막 상에 알루미늄막을 형성하는 단계; 상기 알루미늄막 상에 감광막 패턴을 형성하는 단계; 상기 감광막 패턴을 마스크로 상기 알루미늄막을 식각하여 알루미늄막 패턴을 형성하는 단계; 상기 알루미늄막 패턴의 표면을 산화시켜 식각마스크용 알루미나층을 형성하는 단계; 및 상기 알루미나층을 이용하여 상기 산화막 및 고전도성막을 식각하여 산화막 패턴 및 고전도성막 패턴을 형성하는 단계를 포함하는 것을 특징으로 하는 반도체 장치의 고전도성막 패턴형성방법.Forming a high conductivity film on a semiconductor substrate; Forming an oxide film on the highly conductive film; Forming an aluminum film on the oxide film; Forming a photoresist pattern on the aluminum film; Forming an aluminum film pattern by etching the aluminum film using the photoresist pattern as a mask; Oxidizing the surface of the aluminum film pattern to form an alumina layer for an etching mask; And etching the oxide film and the high conductivity film using the alumina layer to form an oxide film pattern and a high conductivity film pattern. 제1항에 있어서, 상기 고전도성막은 Pt, IrO2또는 RuO2인 것을 특징으로 하는 반도체 장치의 고전도성막 패턴형성방법.The method according to claim 1, wherein the highly conductive film is Pt, IrO 2 or RuO 2 . ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: It is disclosed by the contents of the first application.
KR1019960012545A 1996-04-24 1996-04-24 Method for forming a high conductivity film pattern of a semiconductor device KR970071128A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019960012545A KR970071128A (en) 1996-04-24 1996-04-24 Method for forming a high conductivity film pattern of a semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960012545A KR970071128A (en) 1996-04-24 1996-04-24 Method for forming a high conductivity film pattern of a semiconductor device

Publications (1)

Publication Number Publication Date
KR970071128A true KR970071128A (en) 1997-11-07

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KR1019960012545A KR970071128A (en) 1996-04-24 1996-04-24 Method for forming a high conductivity film pattern of a semiconductor device

Country Status (1)

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KR (1) KR970071128A (en)

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Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 19960424

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