KR970054171A - How to increase cell ratio of driver transistor to access transistor - Google Patents

How to increase cell ratio of driver transistor to access transistor Download PDF

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KR970054171A
KR970054171A KR1019950046088A KR19950046088A KR970054171A KR 970054171 A KR970054171 A KR 970054171A KR 1019950046088 A KR1019950046088 A KR 1019950046088A KR 19950046088 A KR19950046088 A KR 19950046088A KR 970054171 A KR970054171 A KR 970054171A
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South Korea
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gate oxide
transistor
gate electrode
gate
access transistor
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KR1019950046088A
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KR100190380B1 (en
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최국선
안희백
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김주용
현대전자산업 주식회사
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28176—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the definitive gate conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823437—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
    • H01L21/823456—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes gate conductors with different shapes, lengths or dimensions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823462—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate insulating layers, e.g. different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity

Abstract

본 발명은 액세스 트랜지스터와 드라이버 트랜지스터의 게이트 산화막 두께와 게이트전극 두께 차이로 두 트랜지스터 간에 전류값에 차이를 두어 셀 비율을 증가시키는 셀 비율(Ratio) 증대 방법에 관한 것으로, 실리콘 기판 상에 게이트 산화막을 형성하는 단계; 상기 게이트 산화막 상에 게이트 전극용 폴리실리콘막을 형성하는 단계; 상기 게이트 전극 상에 불소를 주입하는 단계; 및 상기 구조물을 열처리하여 상기 실리사이드막에 주입된 불소를 상기 게이트 산화막으로 확산시켜 상기 게이트 산화막과 접하는 상기 게이트 전극 및 실리콘 기판을 산화시킴으로써 상기 게이트 산화막의 두께를 증대시키는 단계를 포함하여 이루어지는 것을 특징으로 한다.The present invention relates to a cell ratio increasing method of increasing a cell ratio by varying a current value between two transistors due to a difference in gate oxide film thickness and gate electrode thickness of an access transistor and a driver transistor. Forming; Forming a polysilicon film for a gate electrode on the gate oxide film; Implanting fluorine on the gate electrode; And heat treating the structure to diffuse fluorine injected into the silicide layer into the gate oxide layer to oxidize the gate electrode and the silicon substrate in contact with the gate oxide layer, thereby increasing the thickness of the gate oxide layer. do.

Description

액세스(Access) 트랜지스터에 대한 드라이브(Driver) 트랜지스터의 셀 비율 증대 방법How to increase cell ratio of driver transistor to access transistor

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도 내지 제3도는 본 발명의 일실시예에 따른 액세스 트랜지스터 및 드라이브(Driver) 트랜지스터 제조 공정 단면도,1 to 3 are cross-sectional views of a process of manufacturing an access transistor and a driver transistor according to an embodiment of the present invention;

Claims (4)

액세스(Access) 트랜지스터 제조 방법에 있어서,In the method of manufacturing an access transistor, 실리콘 기판 상에 게이트 산화막을 형성하는 단계;Forming a gate oxide film on the silicon substrate; 상기 게이트 산화막 상에 게이트 전극용 폴리실리콘막을 형성하는 단계;Forming a polysilicon film for a gate electrode on the gate oxide film; 상기 게이트 전극 상에 불소가 주입된 실리사이드막을 형성하는 단계; 및Forming a silicide film on which the fluorine is implanted; And 상기 구조물을 열처리하여 상기 실리사이드막에 주입된 불소를 상기 게이트 산화막으로 확산시켜 상기 게이트 산화막과 접하는 상기 게이트 전극 및 실리콘 기판을 산화시킴으로써 상기 게이트 산화막의 두께를 증대시키는 단계를 포함하여 이루어지는 것을 특징으로 하는 액세스 트랜지스터 제조 방법.Heat treating the structure to diffuse fluorine injected into the silicide layer into the gate oxide layer to oxidize the gate electrode and the silicon substrate in contact with the gate oxide layer, thereby increasing the thickness of the gate oxide layer. Method of manufacturing an access transistor. 액세스 트랜지스터 제조 방법에 있어서,In the method of manufacturing an access transistor, 실리콘 기판 상에 게이트 산화막을 형성하는 단계;Forming a gate oxide film on the silicon substrate; 상기 게이트 산화막 상에 게이트 전극용 폴리실리콘막을 형성하는 단계;Forming a polysilicon film for a gate electrode on the gate oxide film; 상기 게이트 전극 상에 불소를 주입하는 단계; 및Implanting fluorine on the gate electrode; And 상기 구조물을 열처리하여 상기 폴리사이드막에 주입된 불소를 상기 게이트 산하막으로 확산시켜 상기 게이트 산화막과 접하는 상기 게이트 전극 및 실리콘 기판을 산화시킴으로써 상기 게이트 산화막의 두께를 증대시키는 단계를 포함하여 이루어지는 것을 특징으로 하는 액세스 트랜지스터 제조 방법.Heat-treating the structure to diffuse fluorine injected into the polyside film into the gate underlayer to oxidize the gate electrode and the silicon substrate in contact with the gate oxide film, thereby increasing the thickness of the gate oxide film. An access transistor manufacturing method. 높은 셀 비율(Ratio)을 갖는 액세스 트랜지스터 및 드라이브(Driver) 트랜지스터 제조방법에 있어서,In the method of manufacturing an access transistor and a driver transistor having a high cell ratio (Ratio), 실리콘 기판 상에 게이트 산화막을 형성하고 폴리실리콘막을 사용하여 액세스 트랜지스터 및 드라이버 트랜지스터의 게이트 전극을 동일한 높이를 갖는 일정크기로 형성하는 단계;Forming a gate oxide film on the silicon substrate and forming a gate electrode of the access transistor and the driver transistor into a predetermined size having the same height by using a polysilicon film; 전체구조 상부에 불소가 주입된 실리사이드막을 증착한 후 액세스 트랜지스터가 형성될 게이트 전극 상에만 텅스텐 실리사이드막을 잔류시켜 액세스 트랜지스터의 게이트전극을 드라이버 트랜지스터의 게이트 전극보다 더 높게 형성하는 단계;Forming a gate electrode of the access transistor higher than the gate electrode of the driver transistor by depositing a silicide film implanted with fluorine over the entire structure and then leaving a tungsten silicide layer only on the gate electrode where the access transistor is to be formed; 상기 구조물을 열처리하여 상기 실리사이드막에 주입된 불소를 상기 게이트 산화막으로 확산시켜 상기 게이트 산화막과 접하는 상기 게이트전극 및 실리콘 기판을 산화시킴으로써 상기 게이트 산화막의 두께를 증대시키는 단계; 및Heat treating the structure to diffuse fluorine injected into the silicide layer into the gate oxide layer to oxidize the gate electrode and the silicon substrate in contact with the gate oxide layer to increase the thickness of the gate oxide layer; And 전체구조 상부에 절연막을 증착한 후 상기 절연막을 비등방성 식각하여 액세스 트랜지스터 및 드라이버 트랜지스터의 게이트 전극 측벽에 스페이서를 형성하고 소오스/드레인 영역을 형성하는 단계를 포함하여 이루어지는 것을 특징으로 하는 액세스 트랜지스터 및 드라이브 트랜지스터 제조방법.And depositing an insulating film on the entire structure, and then anisotropically etching the insulating film to form spacers on sidewalls of the gate electrodes of the access transistor and the driver transistor, and to form source / drain regions. Transistor manufacturing method. 높은 셀 비율(Ratio)을 갖는 액세스 트랜지스터 및 드라이브 트랜지스터 제조방법에 있어서,In the method of manufacturing an access transistor and a drive transistor having a high cell ratio (Ratio), 실리콘 기판 상에 게이트 산화막을 형성하고 폴리실리콘막을 사용하여 액세스 트랜지스터 및 드라이버 트랜지스터의 게이트 전극을 동일한 높이를 갖는 일정크기로 형성하는 단계;Forming a gate oxide film on the silicon substrate and forming a gate electrode of the access transistor and the driver transistor into a predetermined size having the same height by using a polysilicon film; 액세스 트랜지스터가 형성될 게이트 전극 상에만 불소를 주입하는 단계;Implanting fluorine only on the gate electrode on which the access transistor is to be formed; 상기 구조물을 열처리하여 상기 폴리실리콘막에 주입된 불소를 상기 게이트 산화막으로 확산시켜 상기 게이트 산화막과 접하는 상기 게이트 전극 및 실리콘 기판을 산화시킴으로써 상기 게이트 산화막의 두께를 증대시키는 단계; 및Heat treating the structure to diffuse fluorine injected into the polysilicon film into the gate oxide film to oxidize the gate electrode and the silicon substrate in contact with the gate oxide film to increase the thickness of the gate oxide film; And 전체구조 상부에 절연막을 증착한 후 상기 절연막을 비등방성 식각하여 액세스 트랜지스터 및 드라이브 트랜지스터의 게이트 전극 측벽에 스페이서를 형성하고 소오스/드레인 영역을 형성하는 단계를 포함하여 이루어지는 것을 특징으로 하는 액세스 트랜지스터 및 드라이브 트랜지스터 제조방법.And depositing an insulating film on the entire structure, and then anisotropically etching the insulating film to form spacers on sidewalls of the gate electrodes of the access transistor and the drive transistor, and to form source / drain regions. Transistor manufacturing method. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950046088A 1995-12-01 1995-12-01 Method of enlarging cell ratio of access transistor vs. driver transistor KR100190380B1 (en)

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