KR970052777A - Manufacturing Method of Semiconductor Device - Google Patents

Manufacturing Method of Semiconductor Device Download PDF

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Publication number
KR970052777A
KR970052777A KR1019950050894A KR19950050894A KR970052777A KR 970052777 A KR970052777 A KR 970052777A KR 1019950050894 A KR1019950050894 A KR 1019950050894A KR 19950050894 A KR19950050894 A KR 19950050894A KR 970052777 A KR970052777 A KR 970052777A
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KR
South Korea
Prior art keywords
film
manufacturing
semiconductor device
water
patterned
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KR1019950050894A
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Korean (ko)
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KR100358161B1 (en
Inventor
이태국
김학문
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김주용
현대전자산업 주식회사
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Priority to KR1019950050894A priority Critical patent/KR100358161B1/en
Publication of KR970052777A publication Critical patent/KR970052777A/en
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Publication of KR100358161B1 publication Critical patent/KR100358161B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31144—Etching the insulating layers by chemical or physical means using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Weting (AREA)

Abstract

본 발명은 증착된 막이 네가티브 프로파일을 형성한 경우 또는 국부적으로 토플로지차가 심한 막이 형성된 경우, 마스크공정시 수용성 물질을 이용함으로써, 감광막의 스컴이 발생되는 현상을 제거하고, 이에 따라 스트링거를 제거하여 패턴의 균일도를 얻을 수 있는 반도체 장치의 제조방법에 관한 것이다.According to the present invention, when a deposited film forms a negative profile or a locally formed film having a severe topological difference, by using a water-soluble material in the mask process, scum of the photosensitive film is eliminated, and thus, a stringer is removed to remove the pattern. The manufacturing method of the semiconductor device which can obtain the uniformity of is provided.

본 발명의 반도체 장치의 제조방법은 하부 패턴층이 형성된 반도체 기판상에 패터닝하고자 하는 막을 형성하는 공정과, 패터닝하고자 하는 막상에 수용성 물질을 증착하는 공정과, 수용성 물질상에 감광막을 도포하고, 노광 및 현상공정을 수행하여 감광막을 패터닝하는 공정과, 감광막을 마스크로 하여 그 하부의 막을 식각하는 공정을 포함한다.In the method of manufacturing a semiconductor device of the present invention, a process of forming a film to be patterned on a semiconductor substrate on which a lower pattern layer is formed, a process of depositing a water-soluble material on the film to be patterned, and applying a photoresist film on the water-soluble material, are exposed. And a step of patterning the photosensitive film by performing a developing step, and etching the film below the photosensitive film as a mask.

Description

반도체 장치의 제조방법Manufacturing Method of Semiconductor Device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제3 (C)-(E)도는 본 발명의 제1실시예에 따른 반도체 장치의 제조공정도.3 (C)-(E) are manufacturing process diagrams of a semiconductor device according to the first embodiment of the present invention.

Claims (8)

하부 패턴층(32)이 형성된 반도체 기판(31)상에 패터닝하고자 하는 막(33)을 형성하는 공정과, 패터닝하고자 하는 막(33)상에 수용성 물질을 증착하는 공정과, 수용성 물질(36)상에 감광막(34)을 도포하고, 노광 및 현상공정을 수행하여 감광막을 패터닝하는 공정과, 감광막(34)을 마스크로 하여 그 하부의 막(33)을 식각하는 공정을 포함하는 것을 특징으로 하는 반도체 장치의 제조방법.Forming a film 33 to be patterned on the semiconductor substrate 31 on which the lower pattern layer 32 is formed, depositing a water soluble material on the film 33 to be patterned, and water soluble material 36 And coating the photoresist film 34 on the substrate, performing exposure and development steps to pattern the photoresist film, and etching the film 33 under the photoresist film 34 as a mask. Method of manufacturing a semiconductor device. 제1항에 있어서, 패터닝하고자 하는 막(33)은 네가티브 포로파일을 갖는 것을 특징으로 하는 반도체 장치의 제조방법.The method of manufacturing a semiconductor device according to claim 1, wherein the film (33) to be patterned has a negative profile. 제1항에 있어서, 패터닝하고자 하는 막(33)은 커다란 토플리지를 갖는 것을 특징으로 하는 반도체 장치의 제조방법.The method of manufacturing a semiconductor device according to claim 1, wherein the film (33) to be patterned has a large topple. 제1항 및 제3항에 있어서, 패터닝하고자 하는 막(33)은 커다란 토플리지를 갖는 경우에, 수용성 물질(36)로 점도가 큰 물질을 사용하는 것을 특징으로 하는 반도체 장치의 제조방법.The method of manufacturing a semiconductor device according to claim 1 or 3, wherein the film (33) to be patterned uses a material having a high viscosity as the water-soluble material (36) when the film (33) has a large toppliage. 제1항에 있어서, 감광막(34)의 패턴형성공정시 수용성 물질(36)에 의해 네가티브 프로파일의 하부 에지부에 빛이 조사되지 않더라도 감광막을 완전히 제거할 수 있는 것을 특징으로 하는 반도체 장치의 제조방법.The method of manufacturing a semiconductor device according to claim 1, wherein in the pattern forming process of the photoresist film 34, the photoresist film can be completely removed even though no light is irradiated to the lower edge portion of the negative profile by the water-soluble material 36. . 하부패턴층(32)이 형성된 반도체 기판(31)상에 패터닝하고자 하는 막(33')을 수용성 물질(36)을 이용하여 평탄화시키는 것을 특징으로 하는 반도체 장치의 제조방법.A method of manufacturing a semiconductor device, characterized in that the film (33 ') to be patterned on the semiconductor substrate (31) on which the lower pattern layer (32) is formed is planarized using a water-soluble material (36). 제6항에 있어서, 수용성 물질(36)로 점도가 낮은 물질을 사용하는 것을 특징으로 하는 반도체 장치의 제조방법.7. A method according to claim 6, wherein a low viscosity material is used as the water soluble material (36). 제6항에 있어서, 수용성 물질(36)이 평탄화용 배리어로서 작용하는 것을 특징으로 하는 반도체 장치의 제조방법.The method of manufacturing a semiconductor device according to claim 6, wherein the water-soluble substance (36) acts as a barrier for planarization. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950050894A 1995-12-16 1995-12-16 Method for manufacturing semiconductor device KR100358161B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950050894A KR100358161B1 (en) 1995-12-16 1995-12-16 Method for manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950050894A KR100358161B1 (en) 1995-12-16 1995-12-16 Method for manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
KR970052777A true KR970052777A (en) 1997-07-29
KR100358161B1 KR100358161B1 (en) 2003-07-10

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0213955A (en) * 1988-07-01 1990-01-18 Fuji Photo Film Co Ltd Photoetching method

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