KR970052229A - Method for forming storage electrode of semiconductor device - Google Patents

Method for forming storage electrode of semiconductor device Download PDF

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Publication number
KR970052229A
KR970052229A KR1019950050448A KR19950050448A KR970052229A KR 970052229 A KR970052229 A KR 970052229A KR 1019950050448 A KR1019950050448 A KR 1019950050448A KR 19950050448 A KR19950050448 A KR 19950050448A KR 970052229 A KR970052229 A KR 970052229A
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South Korea
Prior art keywords
storage electrode
forming
semiconductor device
koh solution
oxidizing agent
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KR1019950050448A
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Korean (ko)
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KR100367498B1 (en
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송태식
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김주용
현대전자산업 주식회사
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Priority to KR1019950050448A priority Critical patent/KR100367498B1/en
Publication of KR970052229A publication Critical patent/KR970052229A/en
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Publication of KR100367498B1 publication Critical patent/KR100367498B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
    • H01L28/90—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions
    • H01L28/92—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions made by patterning layers, e.g. by etching conductive layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)

Abstract

본 발명은 반도체소자의 저장전극 형성방법에 관한 것으로, 하부절연층이 형성된 반도체기판의 예정된 부분에 접속되는 저장전극을 공지의 기술로 형성하고 상기 저장전극 표면에 형성된 자연산화막을 제거한 다음, 일정온도의 KOH 용액을 이용한 식각공정으로 상기 저장전극의 표면상부에 요철을 형성하여 표면적이 증가된 저장전극을 형성함으로써 반도체소자의 고집적화에 충반한 정전용량을 확보할 수 있는 캐패시터를 형성할 수 있어 반도체소자의 특성 및 신뢰성을 향상시키고 그에 따른 반도체소자의 고집적화를 가능하게 하는 기술이다.The present invention relates to a method for forming a storage electrode of a semiconductor device, comprising forming a storage electrode connected to a predetermined portion of a semiconductor substrate on which a lower insulating layer is formed by a known technique, removing a natural oxide film formed on a surface of the storage electrode, and then By forming an uneven surface on the surface of the storage electrode by an etching process using a KOH solution of the semiconductor electrode to form a storage electrode having an increased surface area to form a capacitor capable of securing the capacitance sufficient for high integration of the semiconductor device It is a technique to improve the characteristics and reliability of the semiconductor device according to the resulting high integration.

Description

반도체소자의 저장전극 형성방법Method for forming storage electrode of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1A도 및 제1B도는 본 발명의 실시예에 따른 반도체소자의 저장전극 형성방법을 도시한 단면도.1A and 1B are cross-sectional views illustrating a method of forming a storage electrode of a semiconductor device according to an embodiment of the present invention.

Claims (11)

하부절연층이 형성된 반도체기판의 예정된 부분에 접속되는 저장전극을 공지의 기술로 형성하는 공정과, 상기 저장전극 표면의 자연산화막을 제거하는 공정과, 상기 저장전극을 KOH용액으로 식각함으로써 상기 저장전극의 표면 상부면에 요철이 형성되어 표면적이 증가된 저장전극을 형성하는 공정을 포함하는 반도체소자의 저장전극 형성방법.Forming a storage electrode connected to a predetermined portion of a semiconductor substrate on which a lower insulating layer is formed by a known technique; removing a natural oxide film on the surface of the storage electrode; and etching the storage electrode with a KOH solution. A method of forming a storage electrode of a semiconductor device, the method comprising forming a storage electrode having an increased surface area by forming irregularities on the upper surface of the semiconductor. 제1항에 있어서, 상기 저장전극 형성공정시 증착되는 도전층의 두께는 2000 내지 5000Å 두께로 형성되는 것을 특징으로 하는 반도체소자의 저장전극 형성방법.The method of claim 1, wherein a thickness of the conductive layer deposited during the storage electrode forming process is 2000 to 5000 Å thick. 제1항에 있어서, 상기 KOH 용액은 전체수용액의 3 내지 20퍼센트 농도로 사용되는 것을 특징으로 하는 반도체소자의 저장전극 형성방법.The method of claim 1, wherein the KOH solution is used at a concentration of 3 to 20 percent of the total aqueous solution. 제1항에 있어서, 상기 KOH 용액은 50 내지 80℃온도로 사용되는 것을 특징으로 하는 반도체소자의 저장전극 형성방법.The method of claim 1, wherein the KOH solution is used at a temperature of 50 to 80 ° C. 제1항에 있어서, 상기 식각공정은 IPA와 산화제를 첨가하여 소정양 첨가함으로써 식각속도가 조절되는 것을 특징으로 하는 반도체소자의 저장전극 형성방법.The method of claim 1, wherein the etching process is performed by adding a predetermined amount by adding IPA and an oxidizing agent. 제4항에 있어서, 상기 산화제는 K2Cr2O7이 사용되는 것을 특징으로 하는 반도체소자의 저장전극 형성방법.The method of claim 4, wherein the oxidizing agent is K 2 Cr 2 O 7 . 하부절연층이 형성된 반도체기판의 예정된 부분에 접속되는 도전층을 소정두께 형성하는 공정과, 상기 도전층 표면의 자연산화막을 제거하는 공정과, 상기 도전층을 KOH용액으로 식각함으로써 상기 저장전극의 표면 상부면에 요철이 형성되어 표면적이 증가된 저장전극을 형성하는 공정을 포함하는 반도체소자의 저장전극 형성방법.Forming a predetermined thickness of a conductive layer connected to a predetermined portion of the semiconductor substrate on which the lower insulating layer is formed, removing a natural oxide film on the surface of the conductive layer, and etching the conductive layer with KOH solution to form a surface of the storage electrode. A method of forming a storage electrode of a semiconductor device comprising the step of forming a storage electrode having an uneven surface formed on the upper surface to increase the surface area. 제6항에 있어서, 상기 KOH 용액은 전체수용액의 3 내지 20퍼센트 농도로 사용되는 것을 특징으로 하는 반도체소자의 저장전극 형성방법.The method of claim 6, wherein the KOH solution is used at a concentration of 3 to 20 percent of the total aqueous solution. 제6항에 있어서, 상기 KOH 용액은 50 내지 80℃온도로 사용되는 것을 특징으로 하는 반도체소자의 저장전극 형성방법.The method of claim 6, wherein the KOH solution is used at a temperature of 50 to 80 ° C. 8. 제6항에 있어서, 상기 식각공정은 IPA와 산화제를 첨가하여 소정양 첨가함으로써 식각속도가 조절되는 것을 특징으로 하는 반도체소자의 저장전극 형성방법.The method of claim 6, wherein the etching process is performed by adding a predetermined amount by adding IPA and an oxidizing agent. 제9항에 있어서, 상기 산화제는 K2Cr2O7이 사용되는 것을 특징으로 하는 반도체소자의 저장전극 형성방법.10. The method of claim 9, wherein the oxidizing agent is K 2 Cr 2 O 7 is used. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950050448A 1995-12-15 1995-12-15 Method for forming storage electrode in semiconductor device KR100367498B1 (en)

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KR100367498B1 KR100367498B1 (en) 2003-03-03

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KR101146222B1 (en) 2005-04-30 2012-05-15 매그나칩 반도체 유한회사 Method for manufacturing a semiconductor device

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