KR970049429A - Additional computing device of equalizer - Google Patents
Additional computing device of equalizer Download PDFInfo
- Publication number
- KR970049429A KR970049429A KR1019950061820A KR19950061820A KR970049429A KR 970049429 A KR970049429 A KR 970049429A KR 1019950061820 A KR1019950061820 A KR 1019950061820A KR 19950061820 A KR19950061820 A KR 19950061820A KR 970049429 A KR970049429 A KR 970049429A
- Authority
- KR
- South Korea
- Prior art keywords
- equalizer
- data
- converter
- ram
- counter
- Prior art date
Links
Landscapes
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
Abstract
본 발명은 등화기의 부가적 연상장치에 관한 것으로, 데이타가 입력되는 데이타입력부와, 상기 데이타 입력부에서 아날로그 신호를 디지탈 신호로 변화하는 AD변환기와, 상기 A/D변환기에서 데이타를 저장하는 램과, 상기 AD변환기에서 클럭을 발생시키는 동기추출회로와, 상기 동기추출회로에서 메모리 풀 제어 신호를 출력하는 카운터와, 상기 램과 카운터에 의해 등화기에 필요한 계수 가중치를 연산하여 계수를 갱신하는 프로세싱부와, 상기 프로세싱부에서 내부 가중치 계수와 샘플 데이타의 의해 계수를 갱신하는 등화기와, 상기 등화기에서 데이타를 출력하는 데이타 출력부를 포함하여 지연을 방지할 수 있으며 구현이 한층 간단해질 수 있다.The present invention relates to an additional associative device of an equalizer, comprising: a data input unit for inputting data, an AD converter for converting an analog signal into a digital signal at the data input unit, a RAM for storing data in the A / D converter; A processing unit for updating a coefficient by calculating a synchronous extraction circuit for generating a clock in the AD converter, a counter for outputting a memory pool control signal in the synchronous extraction circuit, and calculating coefficient weights necessary for an equalizer by the RAM and the counter; In addition, the processing unit may include an equalizer for updating coefficients by internal weight coefficients and sample data, and a data output unit for outputting data from the equalizer, thereby preventing delay and simplifying implementation.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.
제1도는 본 발명에 의한 등화기의 부가적 연산장치의 블럭도.1 is a block diagram of an additional computing device of the equalizer according to the present invention.
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950061820A KR970049429A (en) | 1995-12-28 | 1995-12-28 | Additional computing device of equalizer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950061820A KR970049429A (en) | 1995-12-28 | 1995-12-28 | Additional computing device of equalizer |
Publications (1)
Publication Number | Publication Date |
---|---|
KR970049429A true KR970049429A (en) | 1997-07-29 |
Family
ID=66621729
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950061820A KR970049429A (en) | 1995-12-28 | 1995-12-28 | Additional computing device of equalizer |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR970049429A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100813074B1 (en) * | 2001-10-25 | 2008-03-14 | 엘지전자 주식회사 | Apparatus for equalizing of optical record media |
-
1995
- 1995-12-28 KR KR1019950061820A patent/KR970049429A/en not_active Application Discontinuation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100813074B1 (en) * | 2001-10-25 | 2008-03-14 | 엘지전자 주식회사 | Apparatus for equalizing of optical record media |
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Legal Events
Date | Code | Title | Description |
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A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
WITB | Written withdrawal of application | ||
E601 | Decision to refuse application |