KR940008479A - Sampling frequency conversion circuit - Google Patents

Sampling frequency conversion circuit Download PDF

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Publication number
KR940008479A
KR940008479A KR1019920017251A KR920017251A KR940008479A KR 940008479 A KR940008479 A KR 940008479A KR 1019920017251 A KR1019920017251 A KR 1019920017251A KR 920017251 A KR920017251 A KR 920017251A KR 940008479 A KR940008479 A KR 940008479A
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KR
South Korea
Prior art keywords
sampling frequency
frequency conversion
unit
conversion circuit
error
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KR1019920017251A
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Korean (ko)
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KR100213002B1 (en
Inventor
이정상
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윤종용
삼성전자 주식회사
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Priority to KR1019920017251A priority Critical patent/KR100213002B1/en
Publication of KR940008479A publication Critical patent/KR940008479A/en
Application granted granted Critical
Publication of KR100213002B1 publication Critical patent/KR100213002B1/en

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00Television systems
    • H04N7/12Systems in which the television signal is transmitted via one channel or a plurality of parallel channels, the bandwidth of each channel being less than the bandwidth of the television signal

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Television Systems (AREA)

Abstract

본 발명은 샘플링 주파수를 변환하여 디지탈 신호를 처리하기 위한 샘플링 주파수 변환회로에 관한 것으로, 원 샘플링 주파수의 기본 스펙트럼을 유지하면서 샘플링 주파수를 변환시키기 위한 저역통과 필터는, 상기 저역 통과필터의 탭계수 발생부, 상기 탭계수를 샘플링 주파수 변환 관계함수에 따라 선택하기 위한 선택부, 상기 선택부를 통해 선택된 각 계수들을 상기 샘플링 주파수 변환 관계함수에 따라 가산하여 출력하는 출력부, 및 상기 가산단계에서 발생하는 에러를 보정하기 위한 에러 보정부를 구비하여 이루어지는 것을 특징으로 한다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a sampling frequency conversion circuit for converting a sampling frequency to process a digital signal, wherein a low pass filter for converting a sampling frequency while maintaining a basic spectrum of an original sampling frequency includes generating a tap coefficient of the low pass filter. A selection unit for selecting the tap coefficients according to a sampling frequency conversion relation function, an output unit for adding and outputting each coefficient selected through the selection unit according to the sampling frequency conversion relation function, and an error occurring in the adding step Characterized in that it comprises an error correction unit for correcting the.

따라서 본 발명의 샘플링 주파수 변환회로는 저역통과필터의 구현시 하드웨어를 단순화하여 생산가를 절감시키고 처리속도를 향상시킬 수 있으며, 에러의 발생시 이를 보상함으로써 정확도의 향상를 꾀할 수 있다.Therefore, the sampling frequency conversion circuit of the present invention can reduce the production cost and improve the processing speed by simplifying the hardware when the low pass filter is implemented, and can improve the accuracy by compensating for the occurrence of the error.

Description

샘플링 주파수 변환회로Sampling frequency conversion circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 MUSE 방식에 따른 샘플링 주파수 변환방법을 설명하기 위한 간단한 블럭도.1 is a simple block diagram for explaining a sampling frequency conversion method according to the MUSE method.

제2도는 제1도의 샘플링 주파수 변환방법에 의한 주파수변환과정을 도시한 스펙트럼도.FIG. 2 is a spectrum diagram showing a frequency conversion process by the sampling frequency conversion method of FIG.

제3도는 제1도의 샘플링 주파수 변환방법을 설명하기 위한 예시도.3 is an exemplary diagram for explaining a sampling frequency conversion method of FIG.

제4도는 본 발명에 따른 샘플링 주파수 변환회로도.4 is a sampling frequency conversion circuit diagram according to the present invention.

Claims (5)

샘플링 주파수를 변환하여 디지탈 신호를 처리하기 위한 샘플링 주파수 변환회로에 있어서, 원 샘플링 주파수의 기본 스펙트럼을 유지하면서 샘플링 주파수를 변환시키기 위한 저역통과 필터는, 상기 저역통과필터의 탭계수 발생부, 상기 탭계수를 샘플링 주파수 변환 관계함수에 따라 선택하기 위한 선택부, 상기 선택부를 통해 선택된 각 계수들을 상기 샘플링 주파수 변환 관계함수에 따라 가산하여 출력하는 출력부, 및 상기 가산단계에서 발생하는 에러를 보정하기 위한 에러 보정부를 구비하여 이루어지는 것을 특징으로 하는 샘플링 주파수 변환회로.In a sampling frequency conversion circuit for converting a sampling frequency to process a digital signal, a low pass filter for converting a sampling frequency while maintaining a basic spectrum of an original sampling frequency includes a tap coefficient generator and a tap of the low pass filter. A selection unit for selecting coefficients according to a sampling frequency conversion relation function, an output unit for adding and outputting each coefficient selected through the selection unit according to the sampling frequency conversion relation function, and for correcting an error occurring in the addition step And a sampling frequency conversion circuit comprising an error correction unit. 제1항에 있어서, 상기 탭계수발생부는 다수의 바이너리 승산기를 구비하여 이루어지는 것을 특징으로 하는 샘플링 주파수 변환회로.The sampling frequency conversion circuit of claim 1, wherein the tap coefficient generator comprises a plurality of binary multipliers. 제1항에 있어서, 상기 선택부는 다수의 멀티플렉서, 및 상기 멀티플렉서에 선택신호를 인가하기 위한 선택신호 인가부를 구비하여 이루어지는 것을 특징으로 하는 샘플링 주파수 변환회로.The sampling frequency conversion circuit according to claim 1, wherein the selection unit comprises a plurality of multiplexers and a selection signal applying unit for applying a selection signal to the multiplexer. 제1항에 있어서, 상기 에러 보정부는 상기 선택신호를 인가부로부터 선택신호를 인가받아 상기 선택신호가“0 0”이면 1을 출력하여 상기 가산부에 가산함으로써 음수를 가산하기 위한 가산과정에서의 에러를 보정하는 것을 특징으로 하는 샘플링 주파수 변환회로.The method of claim 1, wherein the error correcting unit receives the selection signal from the application unit and outputs 1 when the selection signal is "0 0", and adds the negative number by adding the selection unit to the adding unit. Sampling frequency conversion circuit, characterized in that for correcting the error. 제1항 또는 제4항에 있어서, 상기 에러보정부는 낸드 논리회로로 구성되는 것을 특징으로 하는 샘플링 주파수 변환회로.The sampling frequency converting circuit as claimed in claim 1 or 4, wherein the error correcting unit comprises a NAND logic circuit. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019920017251A 1992-09-22 1992-09-22 Sampling frequency conversion circuit KR100213002B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019920017251A KR100213002B1 (en) 1992-09-22 1992-09-22 Sampling frequency conversion circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920017251A KR100213002B1 (en) 1992-09-22 1992-09-22 Sampling frequency conversion circuit

Publications (2)

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KR940008479A true KR940008479A (en) 1994-04-29
KR100213002B1 KR100213002B1 (en) 1999-08-02

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