KR970018206A - Capacitor Manufacturing Method of Semiconductor Device - Google Patents

Capacitor Manufacturing Method of Semiconductor Device Download PDF

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Publication number
KR970018206A
KR970018206A KR1019950031018A KR19950031018A KR970018206A KR 970018206 A KR970018206 A KR 970018206A KR 1019950031018 A KR1019950031018 A KR 1019950031018A KR 19950031018 A KR19950031018 A KR 19950031018A KR 970018206 A KR970018206 A KR 970018206A
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KR
South Korea
Prior art keywords
conductive layer
storage electrode
pillar
resultant
depositing
Prior art date
Application number
KR1019950031018A
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Korean (ko)
Inventor
박성기
이종섭
Original Assignee
김광호
삼성전자 주식회사
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Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019950031018A priority Critical patent/KR970018206A/en
Publication of KR970018206A publication Critical patent/KR970018206A/en

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
    • H10B12/0335—Making a connection between the transistor and the capacitor, e.g. plug
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
    • H01L28/90—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions
    • H01L28/92—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions made by patterning layers, e.g. by etching conductive layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)

Abstract

반도체 장치의 커패시터 제조방법에 관하여 기재하고 있다. 반도체 기판 상에 적층된 층들을 식각하여 커패시터의 스토리지 전극과 반도체 기판의 소오스를 접속하기 위한 콘택홀을 형성하고, 상기 결과물 상에 도전물을 증착하여 제1도전층을 형성하고, 그위에 CVD 또는 산화물 계열의 물질을 증착한 다음 상기 콘택홀 부분에만 한정적으로 형성되도록 패터닝하여 제1물질층을 형성한다. 이어서, 상기 결과물 상에 도전물을 증착하여 제2도전층을 형성한 다음, 상기 제2도전층을 전면 식각하고 상기 제1물질층을 습식식각으로 제거하여 스토리지 전극의 제1기둥을 형성한다. 제1기둥이 형성된 상기 결과물 상이 CVD계열 또는 산화물 계열의 절연물을 증착한 다음 이방성식각하여 상기 스토리지 전극의 제1기둥 측벽에 스페이서를 형성하고, 상기 결과물 상에 도전물을 증착하여 제3도전층을 형성한 다음, 상기 제3도전층을 전면 식각하고, 상기 스페이서를 습식식각으로 제거하여 스토리지 전극의 제2기둥을 형성한다. 스토리지 전극의 유효면직을 확장시킴으로써 반도체 메모리 장치의 커패시턴스를 증가시킬 수 있다.A method for manufacturing a capacitor of a semiconductor device is described. Etching the layers stacked on the semiconductor substrate to form a contact hole for connecting the storage electrode of the capacitor and the source of the semiconductor substrate, and depositing a conductive material on the resultant to form a first conductive layer, CVD or After depositing an oxide-based material, the first material layer is formed by patterning the oxide-based material to be limited to the contact hole portion. Subsequently, a conductive material is deposited on the resultant to form a second conductive layer, and then the entire surface of the second conductive layer is etched and the first material layer is removed by wet etching to form a first pillar of the storage electrode. The resultant phase on which the first pillar is formed is deposited with an CVD-based or oxide-based insulator, and then anisotropically etched to form a spacer on the sidewall of the first pillar of the storage electrode, and depositing a conductive material on the resultant to form a third conductive layer. After the formation, the third conductive layer is etched entirely, and the spacer is removed by wet etching to form a second pillar of the storage electrode. The capacitance of the semiconductor memory device may be increased by extending the effective surface area of the storage electrode.

Description

반도체 장치의 커패시터 제조방법Capacitor Manufacturing Method of Semiconductor Device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도 내지 제5도는 본 발명의 일 실시예에 따른 커패시터 제조방법을 설명하기 위해 도시한 공정순서도.1 to 5 are process flowcharts shown for explaining a capacitor manufacturing method according to an embodiment of the present invention.

Claims (2)

반도체 기판 상에 적층된 층들을 식각하여 커패시터의 스토리지 전극과 반도체 기판의 소오스를 접속하기 위한 콘택홀을 형성하는 제1단계 콘택홀이 형성된 상기 결과물 상에 도전물을 증착하여 제1도전층을 형성하고, 그 위에 CVD또는 산화물 계열의 물질을 증착한 다음 상기 콘택홀 부분에만 한정적으로 형성되도록 패터닝하여 제1물질층을 형성하는 제2단계; 제1물질층이 형성된 상기 결과물 상에 도전물을 증착하여 제2도전층을 형성한 다음, 상기 제2도전층을 전면 식각하고 상기 제1물질층을 습식식각으로 제거하여 스토리지 전극의 제1기둥을 형성하는 제3단계; 제1기등이 형성된 상기 결과물 상에 CVD계열 또는 산화물 계열의 절연물을 증착한 다음 이방성식각하여 상기 스토리지 전극의 제1기등 측벽에 스페이서를 형성하는 제4단계; 스페이서가 형성된 상기 결과물 상에 도전물을 증착하여 제3도전층을 형성한 다음, 상기 제3도전층을 전면 식각하고, 상기 스페이서를 습식식각으로 제거하여 스토리지 전각의 제2기둥을 형성하는 제5단계를 구비하는 것을 특징으로 하는 반도체 장치의 커패시터 제조방법.The first conductive layer is formed by depositing a conductive material on the resultant, in which the first step contact hole is formed to etch the layers stacked on the semiconductor substrate to form a contact hole for connecting the storage electrode of the capacitor and the source of the semiconductor substrate. A second step of forming a first material layer by depositing a CVD or oxide-based material thereon and patterning it to be limited to only the contact hole portion; After depositing a conductive material on the resultant on which the first material layer is formed, a second conductive layer is formed, and then the entire surface of the second conductive layer is etched and the first material layer is removed by wet etching to form a first pillar of the storage electrode. Forming a third step; A fourth step of forming a spacer on a sidewall of the first lamp of the storage electrode by anisotropic etching by depositing a CVD-based or oxide-based insulator on the resultant on which the first lamp is formed; A fifth conductive layer is formed on the resultant spacer on which the spacer is formed to form a third conductive layer, and then the entire surface is etched from the third conductive layer, and the spacer is wet-etched to form a second pillar of the storage corner. Capacitor manufacturing method of a semiconductor device characterized in that it comprises a step. 제1항에 있어서, 상기 제1도전층, 스토리지 전극의 제1기둥, 및 제2기둥을 스토리지 전극으로 이용하는 것을 특징으로 하는 반도체 장치의 커패시터 제조방법.The method of claim 1, wherein the first conductive layer, the first pillar, and the second pillar of the storage electrode are used as storage electrodes. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950031018A 1995-09-21 1995-09-21 Capacitor Manufacturing Method of Semiconductor Device KR970018206A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950031018A KR970018206A (en) 1995-09-21 1995-09-21 Capacitor Manufacturing Method of Semiconductor Device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950031018A KR970018206A (en) 1995-09-21 1995-09-21 Capacitor Manufacturing Method of Semiconductor Device

Publications (1)

Publication Number Publication Date
KR970018206A true KR970018206A (en) 1997-04-30

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KR1019950031018A KR970018206A (en) 1995-09-21 1995-09-21 Capacitor Manufacturing Method of Semiconductor Device

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