KR970017827A - Structure of Silicon Strip Mesh Spacer and Manufacturing Method Thereof - Google Patents

Structure of Silicon Strip Mesh Spacer and Manufacturing Method Thereof Download PDF

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Publication number
KR970017827A
KR970017827A KR1019950033953A KR19950033953A KR970017827A KR 970017827 A KR970017827 A KR 970017827A KR 1019950033953 A KR1019950033953 A KR 1019950033953A KR 19950033953 A KR19950033953 A KR 19950033953A KR 970017827 A KR970017827 A KR 970017827A
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KR
South Korea
Prior art keywords
spacer
silicon
insulating film
cross
pattern lines
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KR1019950033953A
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Korean (ko)
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KR100199331B1 (en
Inventor
김태곤
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엄길용
오리온전기 주식회사
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Priority to KR1019950033953A priority Critical patent/KR100199331B1/en
Publication of KR970017827A publication Critical patent/KR970017827A/en
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Publication of KR100199331B1 publication Critical patent/KR100199331B1/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J29/00Details of cathode-ray tubes or of electron-beam tubes of the types covered by group H01J31/00
    • H01J29/02Electrodes; Screens; Mounting, supporting, spacing or insulating thereof
    • H01J29/028Mounting or supporting arrangements for flat panel cathode ray tubes, e.g. spacers particularly relating to electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J9/00Apparatus or processes specially adapted for the manufacture, installation, removal, maintenance of electric discharge tubes, discharge lamps, or parts thereof; Recovery of material from discharge tubes or lamps
    • H01J9/24Manufacture or joining of vessels, leading-in conductors or bases
    • H01J9/241Manufacture or joining of vessels, leading-in conductors or bases the vessel being for a flat panel display
    • H01J9/242Spacers between faceplate and backplate

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Manufacture Of Electron Tubes, Discharge Lamp Vessels, Lead-In Wires, And The Like (AREA)
  • Liquid Crystal (AREA)

Abstract

본 발명은 FED에 사용되는 스페이서의 구조 및 제조방법에 관한 것으로 본원 발명은 서로 소정간격으로 이격되어 종(횡)방향으로 진행하는 다수개의 상부 패턴라인과, 상기 상부 패턴라인에 대해 소정간격으로 이격되어 하부에 위치 하며 소정 공간을 두고 횡 (종)방향으로 진행하여 교차하는 각기 분리된 다수개의 하부 패턴라인과, 상기 상부 패턴라인과 하부 패턴라인이 서로 교차하는 지점에서 두 패턴라인을 연결 고정하는 다수개의 기둥을 포함하여서 구성되는 스페이서와 그의 제조방법을 제공한다. 본원 발명에 의한 스페이서는 반도체공정을 이용하여 제조됨으로써 정밀한 스페이서의 제조가 가능하므로 고화질의 FED 장치를 실현하는데 적용될 수 있다.The present invention relates to a structure and a manufacturing method of the spacer used in the FED The present invention is a plurality of upper pattern lines which are spaced apart from each other at a predetermined interval in the longitudinal (lateral) direction and spaced at a predetermined interval with respect to the upper pattern line And a plurality of lower pattern lines which are separated from each other and proceed in a horizontal (vertical) direction with a predetermined space, and connect and fix the two pattern lines at a point where the upper pattern line and the lower pattern line cross each other. Provided are a spacer including a plurality of pillars and a method of manufacturing the same. Since the spacer according to the present invention is manufactured using a semiconductor process, precise spacers can be manufactured, and thus the spacer can be applied to realize a high quality FED device.

Description

실리콘 스트립 매쉬형 스페이서의 구조 및 그의 제조방법Structure of Silicon Strip Mesh Spacer and Manufacturing Method Thereof

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제3도는 본 발명에 따른 공정 순서도를 도시한 단면도,3 is a cross-sectional view showing a process flowchart according to the present invention;

제4도는 본 발명에 따른 스페이서의 사시도,4 is a perspective view of a spacer according to the present invention,

제5도는 본 발명에 따라 형성한 스페이서의 평면도.5 is a plan view of a spacer formed according to the present invention.

Claims (8)

서로 소정간격으로 이격되어 종(횡)방향으로 진행하는 다수개의 상부 패턴라인과, 상기 상부 패턴라인에 대해 소정간격으로 이격되어 하부에 위치하며 소정 공간을 두고 횡 (종)방향으로 진행하여 교차하는 각기 분리된 다수개의 하부 패턴라인과, 상기 상부 패턴라인과 하부 패턴라인이 서로 교차하는 지점에서 두 패턴라인을 연결 고정하는 다수개의 기둥을 포함하여서 구성되는 것을 특징으로 하는 실리콘 스트립 매쉬형 스페이서의 구조.A plurality of upper pattern lines that are spaced apart from each other at a predetermined interval and run in a longitudinal (lateral) direction, and are spaced apart from each other at a predetermined interval with respect to the upper pattern line and positioned at a lower side, and cross each other in a horizontal direction with a predetermined space A structure of a silicon strip mesh spacer comprising a plurality of lower pattern lines separated from each other, and a plurality of pillars connecting and fixing two pattern lines at points where the upper pattern line and the lower pattern line cross each other. . 제1항에 있어서, 상기 두 패턴라인을 연결하는 접촉부가 넓은 면적으로 형성된 것을 특징으로 하는 실리콘 스트립 매쉬형 스페이서의 구조.The structure of a silicon strip mesh spacer according to claim 1, wherein a contact portion connecting the two pattern lines is formed in a large area. 제1항에 있어서, 상기 스페이서의 표면에 절연막이 형성되어 있는 것을 특징으로 하는 실리콘 스트립 매쉬형 스페이서의 구조.The structure of a silicon strip mesh spacer according to claim 1, wherein an insulating film is formed on a surface of said spacer. 실리콘 기판(1)의 후면을 연마하여 소정의 두께로 만든 후, 기판의 양 표면에 절연막(2, 2a)을 형성하는 단계와, 상기 절연막(2, 2a)의 전면에 그 진행방향이 서로 공간적으로 교차하는 감광막 패턴(3', 3a')을 형성하는 단계와, 상기 감광막 패턴(3', 3a')을 식각마스크로 하여 상기 절연막(2, 2a)을 식각하여 절연막 패턴(2', 2a')을 형성하는 단계와, 상기 절연막 패턴(2', 2a')을 식각 마스크로 하여 상기 실리콘 기판 (1)을 식각하는 것을 특징으로 하는 실리콘 스트립 매쉬형 스페이서의 제조방법.After polishing the back surface of the silicon substrate 1 to a predetermined thickness, forming insulating films 2 and 2a on both surfaces of the substrate, and the advancing directions on the front surfaces of the insulating films 2 and 2a are mutually spaced. Forming photoresist patterns 3 'and 3a' that cross each other; and etching the insulating films 2 and 2a using the photoresist patterns 3 'and 3a' as an etch mask. ') And etching the silicon substrate (1) using the insulating film patterns (2', 2a ') as an etch mask. 제4항에 있어서, 상기 실리콘 기판(1)은 결정방향이 (100) 또는 (110)인 실리콘 웨이퍼인 것을 특징으로 하는 실리콘 스트립 매쉬형 스페이서의 제조방법.5. A method according to claim 4, wherein the silicon substrate (1) is a silicon wafer whose crystal orientation is (100) or (110). 제4항에 있어서, 상기 절연막(2, 2a)은 산화막과 질화막의 2중층으로 형성되는 것을 특징으로 하는 실리콘 스트립 매쉬형 스페이서의 제조방법.A method according to claim 4, wherein the insulating film (2, 2a) is formed of a double layer of an oxide film and a nitride film. 제4항에 있어서, 상기 감광막 패턴(3', 3a')은 공간적으로 교차 지점에서 넓은 면적으로 형성되는 것을 특징으로 하는 실리콘 스트립 매쉬형 스페이서의 제조방법.5. A method according to claim 4, wherein the photoresist pattern (3 ', 3a') is formed in a large area at a cross point spatially. 제4항에 있어서, 상기 스페이서의 표면에 절연막을 형성하는 단계를 추가로 포함하는 것을 특징으로 하는 실리콘 스트립 매쉬형 스페이서의 제조방법.5. The method of claim 4, further comprising forming an insulating film on the surface of the spacer. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950033953A 1995-09-30 1995-09-30 Structure of silicon stripe mesh typed spacer and manufacturing method thereof KR100199331B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950033953A KR100199331B1 (en) 1995-09-30 1995-09-30 Structure of silicon stripe mesh typed spacer and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950033953A KR100199331B1 (en) 1995-09-30 1995-09-30 Structure of silicon stripe mesh typed spacer and manufacturing method thereof

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KR970017827A true KR970017827A (en) 1997-04-30
KR100199331B1 KR100199331B1 (en) 1999-06-15

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KR100464306B1 (en) * 1998-09-25 2005-02-28 삼성에스디아이 주식회사 Field emission display and manufacturing method of the same

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