KR970013314A - Capacitor Manufacturing Method of Semiconductor Device - Google Patents
Capacitor Manufacturing Method of Semiconductor Device Download PDFInfo
- Publication number
- KR970013314A KR970013314A KR1019950026712A KR19950026712A KR970013314A KR 970013314 A KR970013314 A KR 970013314A KR 1019950026712 A KR1019950026712 A KR 1019950026712A KR 19950026712 A KR19950026712 A KR 19950026712A KR 970013314 A KR970013314 A KR 970013314A
- Authority
- KR
- South Korea
- Prior art keywords
- insulating film
- conductive layer
- forming
- insulating
- storage pattern
- Prior art date
Links
- 239000003990 capacitor Substances 0.000 title claims abstract description 8
- 239000004065 semiconductor Substances 0.000 title claims abstract description 6
- 238000004519 manufacturing process Methods 0.000 title abstract description 4
- 238000000034 method Methods 0.000 claims abstract 9
- 238000005498 polishing Methods 0.000 claims abstract 4
- 239000000758 substrate Substances 0.000 claims abstract 4
- 239000000126 substance Substances 0.000 claims abstract 2
- 238000005530 etching Methods 0.000 claims 3
- 239000000463 material Substances 0.000 claims 3
- 125000006850 spacer group Chemical group 0.000 claims 3
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/60—Electrodes
- H01L28/75—Electrodes comprising two or more layers, e.g. comprising a barrier layer and a metal layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
Abstract
다마신 공정을 이용한 반도체장치의 커패시터 제조방법이 개시되어 있다. 반도체기판 상에 제1 절연막을 형성한 후, 제1 절연막을 소정깊이로 식각하여 스토리지 패턴을 형성한다. 스토리지 패턴을 통해 노출된 제1 절연막 부위를 식각하여 스토리지 패턴의 폭보다 좁은 폭을 갖고 기판의 소정부위를 노출시키는 콘택홀을 형성한다. 결과물 상에 제1 도전층 및 제2 절연막을 차례로 형성한다. 화학기계폴리싱 방법으로 제2 절연막 및 제1 도전층을 폴리싱한 후, 제2 절연막을 제거하여 커패시터 스토리지 전극을 형성한다. 다마신 공정에 의해 커패시터 스토리지전극을 용이하게 패터닝할 수 있다.A method of manufacturing a capacitor of a semiconductor device using a damascene process is disclosed. After forming the first insulating film on the semiconductor substrate, the first insulating film is etched to a predetermined depth to form a storage pattern. The first insulating layer portion exposed through the storage pattern is etched to form a contact hole having a width narrower than that of the storage pattern and exposing a predetermined portion of the substrate. The first conductive layer and the second insulating film are sequentially formed on the resultant. After polishing the second insulating film and the first conductive layer by a chemical mechanical polishing method, the second insulating film is removed to form a capacitor storage electrode. The capacitor storage electrode can be easily patterned by the damascene process.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제1a도 내지 제1f도는 본 발명이 제1 실시예에 의해 반도체장치의 커패시터 제조방법을 설명하기 위한 단면도들.1A to 1F are cross-sectional views illustrating a method of manufacturing a capacitor of a semiconductor device according to the first embodiment of the present invention.
제2a도 내지 제2d도는 본 발명의 제2 실시예에 의한 반도체장치의 커패시터 제조방법을 설명하기 위한 단면도.2A to 2D are cross-sectional views for explaining a capacitor manufacturing method of a semiconductor device according to a second embodiment of the present invention.
Claims (5)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950026712A KR0147660B1 (en) | 1995-08-26 | 1995-08-26 | Manufacturing method of semiconductor capacitor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950026712A KR0147660B1 (en) | 1995-08-26 | 1995-08-26 | Manufacturing method of semiconductor capacitor |
Publications (2)
Publication Number | Publication Date |
---|---|
KR970013314A true KR970013314A (en) | 1997-03-29 |
KR0147660B1 KR0147660B1 (en) | 1998-08-01 |
Family
ID=19424585
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950026712A KR0147660B1 (en) | 1995-08-26 | 1995-08-26 | Manufacturing method of semiconductor capacitor |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR0147660B1 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100564064B1 (en) * | 1997-06-03 | 2006-07-25 | 프리스케일 세미컨덕터, 인크. | Dual-Layer Integrated Circuit Structure and Formation with Optionally Placed Low-K Dielectric Isolation |
KR100833394B1 (en) * | 2002-07-05 | 2008-05-28 | 매그나칩 반도체 유한회사 | Method of forming capacitor |
-
1995
- 1995-08-26 KR KR1019950026712A patent/KR0147660B1/en not_active IP Right Cessation
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100564064B1 (en) * | 1997-06-03 | 2006-07-25 | 프리스케일 세미컨덕터, 인크. | Dual-Layer Integrated Circuit Structure and Formation with Optionally Placed Low-K Dielectric Isolation |
KR100833394B1 (en) * | 2002-07-05 | 2008-05-28 | 매그나칩 반도체 유한회사 | Method of forming capacitor |
Also Published As
Publication number | Publication date |
---|---|
KR0147660B1 (en) | 1998-08-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR950015770A (en) | Capacitor Manufacturing Method of Semiconductor Device | |
KR970024206A (en) | A method for manufacturing a capacitor of a semiconductor memory device. | |
KR970013314A (en) | Capacitor Manufacturing Method of Semiconductor Device | |
KR980006391A (en) | Method for manufacturing capacitor of semiconductor memory device | |
KR960030327A (en) | Contact hole formation method of semiconductor device | |
KR970054008A (en) | Capacitor Manufacturing Method of Semiconductor Device | |
KR960035800A (en) | Contact formation method of semiconductor device | |
KR960026864A (en) | Capacitor Manufacturing Method of Semiconductor Device | |
KR960006001A (en) | Capacitor Manufacturing Method of Semiconductor Device | |
KR970018496A (en) | Method for forming storage electrode of semiconductor device | |
KR970008350A (en) | Method for manufacturing contact hole of semiconductor device | |
KR960019488A (en) | Wiring pattern formation method of semiconductor device | |
KR940012499A (en) | How to Form Contact Holes | |
KR970052248A (en) | Contact hole formation method of semiconductor device | |
KR980005671A (en) | Stack contact formation method of semiconductor device | |
KR960043152A (en) | Capacitor of semiconductor device and manufacturing method thereof | |
KR950021076A (en) | Contact hole formation method of semiconductor device | |
KR960015751A (en) | Micro pattern formation method of semiconductor device | |
KR960035808A (en) | Self-aligned contact formation method | |
KR960026741A (en) | Capacitor Manufacturing Method of Semiconductor Device | |
KR950024345A (en) | Semiconductor Memory Device Manufacturing Method | |
KR960026791A (en) | Capacitor Manufacturing Method of Semiconductor Device | |
KR970030404A (en) | Interlayer insulating film planarization method of semiconductor device | |
KR960036066A (en) | Capacitor Manufacturing Method of Semiconductor Device | |
KR970008356A (en) | Contact hole wiring method of optical path control device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20100429 Year of fee payment: 13 |
|
LAPS | Lapse due to unpaid annual fee |