KR960026163A - Contact hole formation method of semiconductor device - Google Patents

Contact hole formation method of semiconductor device Download PDF

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Publication number
KR960026163A
KR960026163A KR1019940034571A KR19940034571A KR960026163A KR 960026163 A KR960026163 A KR 960026163A KR 1019940034571 A KR1019940034571 A KR 1019940034571A KR 19940034571 A KR19940034571 A KR 19940034571A KR 960026163 A KR960026163 A KR 960026163A
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KR
South Korea
Prior art keywords
contact hole
forming
etching
photoresist pattern
photoresist
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Application number
KR1019940034571A
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Korean (ko)
Other versions
KR0137433B1 (en
Inventor
이창석
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019940034571A priority Critical patent/KR0137433B1/en
Publication of KR960026163A publication Critical patent/KR960026163A/en
Application granted granted Critical
Publication of KR0137433B1 publication Critical patent/KR0137433B1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76804—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics by forming tapered via holes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31144—Etching the insulating layers by chemical or physical means using masks

Abstract

본 발명은 반도체 소자의 콘택홀 형성방법에 관한 것으로, 콘택홀 형성을 위한 습식식각시 발생되는 인접하는 다른 콘택홀과의 접속을 방지하기 위하여 1차 콘택홀을 형성한 후 임계치수가 큰 마스크를 이용하여 감광막패턴의 각측부를 경사지게 형성하고 감광막의 손실이 많은 식각제를 사용한 건식식각을 실시하여 2차 콘택홀을 형성하므로써 콘택홀간의 접속을방지하며 금속의 층덮힘 특성을 향상시켜 소자의 전기적특성 및 수율이 향상될 수 있도록 한 반도체 소자의 콘택홀 형성방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a contact hole in a semiconductor device, wherein a mask having a large critical dimension is formed after forming a primary contact hole in order to prevent contact with another adjacent contact hole generated during wet etching for forming a contact hole. By forming inclined sides of the photoresist pattern and dry etching using an etchant with high loss of the photoresist to form secondary contact holes, thereby preventing contact between the contact holes and improving metal layer covering characteristics And it relates to a method for forming a contact hole of a semiconductor device so that the yield can be improved.

Description

반도체 소자의 콘택홀 형성방법Contact hole formation method of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제 1a 내지 제 1c 도는 본 발명에 따른 반도체 소자의 콘택홀 형성방법을 설명하기 위한 소자의 단면도.1A to 1C are cross-sectional views of a device for explaining a method for forming a contact hole in a semiconductor device according to the present invention.

Claims (6)

반도체 소자의 콘택홀 형성방법에 있어서, 실리콘기판상의 절연막 상부에 감광막을 도포하고 제 1 콘택홀 마스크를 이용한 사진 및 식각공정에 의해 제 1 감광막패턴을 형성한 후 상기 제 1 감광막패턴을 식각마스크로 이용하여 상기 절연막을 소정깊이 건식식각하는 단계와, 상기 단계로 부터 상기 제 1 감광막패턴을 제거한 후 다시 감광막을 도포하고 제 2 콘택홀 마스크를 이용한 사진 및 식각공정에 의해 제 2 감광막패턴을 형성시키는 단계와, 상기 단계로부터 상기 제 2 감광막패턴을 식각마스크로 이용하여 상기 절연막의 나머지 두께를 식각하는 단계로 이루어지는 것을 특징으로 하는 반도체 소자의 콘택홀 형성방법.In the method for forming a contact hole in a semiconductor device, after forming a first photoresist pattern by applying a photoresist film on the insulating film on a silicon substrate and a photolithography process using a first contact hole mask, the first photoresist pattern is used as an etching mask. Dry etching the insulating film by a predetermined depth, removing the first photoresist pattern from the step, and then applying the photoresist again to form a second photoresist pattern by a photo and etching process using a second contact hole mask. And etching the remaining thickness of the insulating layer using the second photoresist pattern as an etching mask from the step. 제 1 항에 있어서, 상기 제 2 콘택홀 마스크는 상기 제 1 콘택홀 마스크 보다 큰 임계치수를 갖는 것을 특징으로 하는 반도체 소자의 콘택홀형성방법.The method of claim 1, wherein the second contact hole mask has a larger critical dimension than the first contact hole mask. 제 1 항에 있어서, 상기 제 2 감광막패턴은 각 측부가 경사지게 형성되는 것을 특징으로 하는 반도체 소자의 콘택홀 형성방법.The method of claim 1, wherein each side of the second photoresist pattern is formed to be inclined. 제 3 항에 있어서, 상기 제 2 감광막패턴의 각 측부에 형성된 경사는 사진공정시 포커스를 과도하게 조절하여 이루어지는 것을 특징으로 하는 반도체 소자의 콘택홀 형성방법.4. The method of claim 3, wherein the inclination formed on each side of the second photoresist pattern is made by excessively adjusting the focus during the photolithography process. 제 1 항에 있어서, 상기 절연막의 나머지 두께를 식각하기 위한 식각공정은 감광막의 손실을 많게 하는 식각제를 이용한 건식식각공정인 것을 특징으로 하는 반도체 소자의 콘택홀 형성방법.The method of claim 1, wherein the etching process for etching the remaining thickness of the insulating layer is a dry etching process using an etchant to increase the loss of the photoresist layer. 제 5 항에 있어서, 상기 감광막의 손실을 많게 하는 식각제는 P1789(ETE)O2인 것을 특징으로 하는 반도체 소자의 콘택홀 형성방법.The method of claim 5, wherein the etching agent that increases the loss of the photoresist layer is P1789 (ETE) O 2 . ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940034571A 1994-12-16 1994-12-16 Contact hole fabrication method of semiconductor device KR0137433B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940034571A KR0137433B1 (en) 1994-12-16 1994-12-16 Contact hole fabrication method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940034571A KR0137433B1 (en) 1994-12-16 1994-12-16 Contact hole fabrication method of semiconductor device

Publications (2)

Publication Number Publication Date
KR960026163A true KR960026163A (en) 1996-07-22
KR0137433B1 KR0137433B1 (en) 1998-06-01

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940034571A KR0137433B1 (en) 1994-12-16 1994-12-16 Contact hole fabrication method of semiconductor device

Country Status (1)

Country Link
KR (1) KR0137433B1 (en)

Also Published As

Publication number Publication date
KR0137433B1 (en) 1998-06-01

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