KR960013078A - Optical cable T.V. Synchronization and clock generator for clock switching in distribution center of CATV network - Google Patents

Optical cable T.V. Synchronization and clock generator for clock switching in distribution center of CATV network Download PDF

Info

Publication number
KR960013078A
KR960013078A KR1019940024373A KR19940024373A KR960013078A KR 960013078 A KR960013078 A KR 960013078A KR 1019940024373 A KR1019940024373 A KR 1019940024373A KR 19940024373 A KR19940024373 A KR 19940024373A KR 960013078 A KR960013078 A KR 960013078A
Authority
KR
South Korea
Prior art keywords
clock
dependent
subordinate
data
signal
Prior art date
Application number
KR1019940024373A
Other languages
Korean (ko)
Other versions
KR0135220B1 (en
Inventor
박상조
강성수
이찬구
Original Assignee
양승택
재단법인 한국전자통신연구소
조백제
한국전기통신공사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 양승택, 재단법인 한국전자통신연구소, 조백제, 한국전기통신공사 filed Critical 양승택
Priority to KR1019940024373A priority Critical patent/KR0135220B1/en
Publication of KR960013078A publication Critical patent/KR960013078A/en
Application granted granted Critical
Publication of KR0135220B1 publication Critical patent/KR0135220B1/en

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00Television systems
    • H04N7/10Adaptations for transmission by electrical cable
    • H04N7/106Adaptations for transmission by electrical cable for domestic distribution
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/04Synchronising
    • H04N5/06Generation of synchronising signals
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00Television systems
    • H04N7/10Adaptations for transmission by electrical cable
    • H04N7/102Circuits therefor, e.g. noise reducers, equalisers, amplifiers
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00Television systems
    • H04N7/22Adaptations for optical transmission

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Optical Communication System (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

본 발명은 광케이블 티.브이.(CATV)망에서의 분배 센터내 클럭 절체 장치에 관한 것으로, 중심국내 시스템 기준 클럭을 발생시키는 동기 장치에서 기준 신호 DS3를 발생시킬 때 약속된 데이터를 엔코딩시켜, 분배센터내의 종속 클럭 발생기에서 DS3 기준신호에서 데이터를 디코딩하여 그 데이터값이 일치할 때 종속 기준신호로 기준 신호를 인지하고 이것에 의해 클럭 절체가 이루어지도록 한 분배 센터내 클럭 절체 장치이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a clock switching device in a distribution center in an optical cable T.V. (CATV) network, which encodes and distributes data promised when generating a reference signal DS3 in a synchronization device that generates a system reference clock in a central station. The slave clock generator in the center decodes the data from the DS3 reference signal, and when the data values coincide with the reference signal as the slave reference signal, thereby switching the clock in the distribution center.

Description

[도면의 간단한 설명][Brief Description of Drawings]

제1도는 본 발명이 적용되는 광 CATV 동기망 구성도.1 is an optical CATV synchronization network configuration to which the present invention is applied.

제2도는 본 발명에 따른 동기 장치의 블록 구성도.2 is a block diagram of a synchronization device according to the present invention.

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

Claims (3)

광 CATV 망의 중심국내의 계층 3 이상의 전화국(12)으로부터의 선로부호화된 신호를 입력받아 클럭을 추출하는 표준신호 수신수단 : 상기 표준신호 수신수단으로부터의 클럭을 입력받아 광 CATV 망 시스팀 기준 클럭을 발생시키는 시스팀 클럭 발생수단 : 상기 시스팀 클럭 발생수단으로부터의 기준 클럭을 이용하여 종속 클럭을 발생하는 종속 클럭 발생수단 ; 종속 데이터를 발생하는 종속 데이터 발생수단 ; 상기 종속 클럭 발생 수단 및 종속 데이터 발생수단으로부터의 종속 클럭 및 종속 데이터를 엔코딩하여 선로 부호화된 신호를 생성하여 상기 제1광전송부(13)를 통해 상기 분배센터(20)로 전송하도록 하는 종속 신호 발생수단을 구비하는 동기 수단 : 및 상기 동기 수단내의 상기 종속 신호 발생 수단으로부터 선로 부호화된 신호를 수신하여 디코딩하여 종속 클럭 및 데이터를 추출하여 출력하는 종속 신호 수신 수단 : 상기 종속 신호 수신 수단으로부터 출력되는 종속 데이터가 상기 동기수단내의 종속 데이터 발생수단에서 발생한 데이터와 일치하는지 비교하여 종속 데이터 일치신호를 출력하는 종속 데이터 비교수단 : 상기 종속 데이터 비교 수단으로부터의 종속 데이터 일치신호를 입력받아 이에 따라 클럭 절체 제어 신호를 출력하는 클럭 절체 제어수단 : 상기 클럭 절체 제어 수단으로부터의 제어신호에 따라 상기 종속 신호 수신 수단으로부터의 종속 클럭을 선택하여 출력하는 종속 클럭 선택 수단 : 상기 종속 클럭 선택 수단으로부터의 클럭을 입력받아 동기된 클럭을 발생하여 광 CATV 망의 분배 센터에 공급하는 위상 동기 수단을 구비하는 클럭 발생수단을 포함하는 것을 특징으로 하는 광케이블 티.브이.(CATV) 망의 분배 센터내 클럭 절체를 위한 동기 및 클럭 발생 장치.Standard signal receiving means for receiving a line-coded signal from a layer 3 or more telephone station 12 in a central station of an optical CATV network and extracting a clock: receiving a clock from the standard signal receiving means and receiving an optical CATV network system reference clock A system clock generating means for generating the slave clock generating means comprising: dependent clock generating means for generating a dependent clock using a reference clock from the system clock generating means; Dependent data generating means for generating dependent data; Dependent clock generation by encoding the dependent clock and the dependent data from the dependent clock generating means and the dependent data generating means to generate a line-coded signal and transmitting the dependent signal to the distribution center 20 through the first optical transmitter 13. Synchronizing means having means; and subordinate signal receiving means for receiving and decoding a line coded signal from said subordinate signal generating means in said synchronizing means, extracting and outputting a subordinate clock and data: subordinate outputted from said subordinate signal receiving means Subordinate data comparison means for outputting a subordinate data matching signal by comparing whether data coincides with data generated by the subordinate data generating means in the synchronizing means: receiving a subordinate data matching signal from the subordinate data comparing means and accordingly a clock switching control signal Clock switching output Means: Subordinate clock selection means for selecting and outputting a slave clock from the slave signal receiving means in accordance with a control signal from the clock switching control means: Generates a synchronized clock by receiving the clock from the slave clock selection means And a clock generating means having a phase synchronizing means for supplying to a distribution center of a CATV network. 10. A synchronizing and clock generating apparatus for clock switching in a distribution center of a CATV network. 제1항에 있어서, 상기 동기 수단내의 표준 신호 수신 수단, 시스팀 클럭 발생 수단, 종속 클럭 발생 수단, 종속 신호 발생 수단, 및 상기 클럭 발생 수단내의 종속 신호 수신 수단, 종속 데이터 비교 수단은 이중화되도록 구성한 것을 특징으로 하는 광케이블 티.브이.(CATV) 망의 분배 센터내 클럭 절체를 위한 동기 및 클럭 발생 장치.The method according to claim 1, wherein the standard signal receiving means, the system clock generating means, the dependent clock generating means, the dependent signal generating means, and the dependent signal receiving means and the dependent data comparing means in the synchronizing means are configured to be redundant. A synchronization and clock generator for switching clocks in a distribution center of an optical fiber cable (CATV) network. 1항에 있어서, 상기 클럭 발생 수단내의 위상 동기 수단은 PLL(Phase Locked Loop)회로로 이루어진 것을 특징으로 하는 광케이블 티.브이.(CATV) 망의 분배 센터내 클럭 절체를 위한 동기 및 클럭 발생 장치.2. The apparatus of claim 1, wherein the phase synchronizing means in the clock generating means comprises a phase locked loop (PLL) circuit. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940024373A 1994-09-27 1994-09-27 Sync and clock generating device for converting clock within KR0135220B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940024373A KR0135220B1 (en) 1994-09-27 1994-09-27 Sync and clock generating device for converting clock within

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940024373A KR0135220B1 (en) 1994-09-27 1994-09-27 Sync and clock generating device for converting clock within

Publications (2)

Publication Number Publication Date
KR960013078A true KR960013078A (en) 1996-04-20
KR0135220B1 KR0135220B1 (en) 1998-04-22

Family

ID=19393639

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940024373A KR0135220B1 (en) 1994-09-27 1994-09-27 Sync and clock generating device for converting clock within

Country Status (1)

Country Link
KR (1) KR0135220B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100471558B1 (en) * 2002-02-19 2005-03-08 주식회사 자생당 Manufacturing method for phytin or phytic acid using rice bran

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100471558B1 (en) * 2002-02-19 2005-03-08 주식회사 자생당 Manufacturing method for phytin or phytic acid using rice bran

Also Published As

Publication number Publication date
KR0135220B1 (en) 1998-04-22

Similar Documents

Publication Publication Date Title
EP0444832A2 (en) Data link with an imbedded channel
KR960013078A (en) Optical cable T.V. Synchronization and clock generator for clock switching in distribution center of CATV network
CN102185998B (en) A method for synchronizing video signals by employing AES/EBU digital audio signals
CN1758583B (en) Clock, signal multiplex method and system
CA2026139A1 (en) Clock supply for multiplex systems
KR100328757B1 (en) A error preventing device of clock signal with switchover for transmission system
KR0164127B1 (en) Apparatus of maintaining a clock synchronization
JP2525469B2 (en) Jitterless optical transmission method
JPH11296393A (en) Dummy but removing device of fec code word and encoding device
JPH0897792A (en) Digital multiplex transmission system
KR100221307B1 (en) Apparatus for generating an external e1 data in a synchronous transfer mode
US6714610B1 (en) Method of transmitting clock signals, method of synchronizing clock generators or network elements, as well as a network element and a clock generator
JPH07231316A (en) Duplex communication equipment
KR100602626B1 (en) Apparatus for selecting network synchronous clock signal of switching system
KR930015910A (en) Synchronous Clock Distribution Device for Electronic Switching System
KR19980066883A (en) Clock Generator in Multicomputer System
KR200292559Y1 (en) synchronous source generating device of the multiplexing system
KR100306161B1 (en) A circuit for synchronizing clock between exchange station systems
KR980007066A (en) Network Synchronization Method for Satellite Communication System and Its Apparatus
JPH05304508A (en) Clock supply system
KR970024375A (en) An apparatus for synchronizing system clock to network in a digital exchanger
KR200259810Y1 (en) Line Interface Apparatus Between Access Gateway And Switching System
JPH0282830A (en) Data conversion relay system
KR970057767A (en) Jitter absorption and video signal transmission of video data in distribution switch network of optical cable TV system
JPS61200787A (en) Digital video transmission system

Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20100108

Year of fee payment: 13

LAPS Lapse due to unpaid annual fee