JPH05304508A - Clock supply system - Google Patents

Abstract

PURPOSE:To improve the reliability of transmission of an overhead signal by using a reference clock signal from a highly stable in-equipment reference clock source for phase synchronization of a PLO so as to implement section overhead signal multiplexing when an input clock signal is interrupted. CONSTITUTION:An input clock interruption detection section 2 detects interruption of a clock signal C3 inputted as a co-directional clock signal of a data signal D2 from a clock transfer memory section 1 and outputs a clock selection control signal X1. A clock selection section 3 receives an in-equipment reference clock signal C2, the clock signal C3 and the clock control signal X1. Upon the receipt of the clock control signal X1 due to the interruption of the clock signal C3, the section 3 outputs the in-equipment reference clock signal C2 as a PLO synchronizing signal C4. A PLO 4 receives a PLO synchronization clock signal C4 and outputs a PLO output clock signal C5 phase-locked to the PLO synchronization clock signal C4.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a clock supply system, and more particularly to a section overhead signal multiplex section for a transmission side section overhead signal multiplex section facing between stations of a synchronous network transmission system compatible with synchronous digital hierarchy. The clock supply system for multiplexing the section overhead signal by using the clock signal which is phase-synchronized with the input clock signal in the same direction as the main signal input data of.

[0002]

2. Description of the Related Art Conventionally, Synchronous Digital H
In the section overhead signal multiplex section on the transmission end side facing between stations of a synchronous network transmission system compatible with wireless communication, a clock signal phase-synchronized with an input clock signal in the same direction as the main signal input data of the section overhead signal multiplex section In the clock supply system that multiplexes the section overhead signal by using, as shown in FIG.
Main signal input data D2 of section overhead signal multiplexer BB and co-directional input clock signal C
PLO (Phase) as means for outputting a clock signal C5 phase-synchronized with the input clock signal C3
-Locked Oscillator 4 is used, and when the input clock signal C3 is cut off, P
The section overhead signal was multiplexed using the output clock signal C5 at the free running frequency of LO4.

[0003]

This conventional clock supply system is generally used when the main signal input data D2 of the section overhead signal multiplexer BB and the co-directional input clock signal C3 are disconnected. The output clock signal C3 at the free-running frequency of the PLO to be generated has a drawback that the frequency variation is large due to the variation of the ambient temperature, the power supply voltage and the like, and an error may occur in the section overhead transmission between the stations.

The object of the present invention is to provide a complicated and expensive device which eliminates the above-mentioned problems even when the main signal input data and the co-directional input clock signal of the section overhead signal multiplexer are disconnected. An object of the present invention is to provide a clock supply system that improves the reliability of section overhead signal transmission without using a PLO.

[0005]

The clock supply system of the present invention is mainly used in a clock supply system of a section overhead signal multiplex section on the transmission end side facing between stations of a synchronous network system compatible with synchronous digital hierarchy. First means for detecting disconnection of the input clock signal in the same direction as the signal input data, and one of the input clock signal and the in-apparatus reference clock signal is selected and output based on the detection result of the first means. The section overhead signal is multiplexed using the second means, the third means for outputting a clock signal that is phase-locked with the signal output by the second means, and the clock signal output by the third means. And a fourth means for converting the same.

The third means may be a phase locked oscillator.

[0007]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention. In the inter-station transmission equipment of a synchronous network transmission system compatible with synchronous digital hierarchy, transmission end side section overhead signal multiplexing for inter-station transmission. It shows the part B and its peripheral part.

The clock transfer section A of this embodiment transfers the data signal D1 synchronized with the transmission path clock signal C1 extracted from the transmission path to the in-apparatus reference clock signal C2 after the section overhead signal is terminated. The section overhead signal multiplexer B has a function, and the section overhead signal multiplexer B has the data signal D after the clock replacement.
2 has a function of multiplexing a section overhead signal. The details will be described below.

The clock transfer memory unit 1 receives the data signal D1, the transmission path clock signal C1 and the in-apparatus reference clock signal C2, and synchronizes the data signal D1 synchronized with the transmission path clock signal C1 with the in-apparatus reference clock signal C2. The data signal D2 is output.

The input clock loss detection unit 2 receives a clock signal C3 from the clock transfer memory unit 1 as a co-directional clock signal with the data signal D2.
When the signal is disconnected, the clock selection control signal X1 is output. The clock selection unit 3 inputs the in-apparatus reference clock signal C2, the clock signal C3, and the clock selection control signal X1. When the clock signal C3 is normal, the clock selection unit 3 outputs the clock signal C3 and the clock selection control signal by disconnecting the clock signal C3. When X1 is input, the in-apparatus reference clock signal C2 is output as the PLO synchronization clock signal C4. PLO4 is a clock signal C for PLO synchronization
4 is input and a clock signal phase-locked with the PLO synchronization clock signal C4 is output as a PLO output clock C5.

The section overhead signal inserting section 5 is
The data signal D2 and the PLO output clock signal C5 are input, the data signal D2 is retimed with the PLO output clock signal C5 and output as the output data signal D3 and the PLO output clock signal C5 as the output clock C6.

The internal reference clock source 6 reproduces a synchronous network clock input from the outside or extracted from the main signal, or a clock signal phase-synchronized with the synchronous network clock generated by the internal reference clock oscillator. It is distributed as the clock signal C2. Here, it outputs to the clock transfer memory unit 1 and the clock selection unit 3.

On the other hand, in the conventional example of FIG. 2, when the signal disconnection between the data signal D2 and the clock signal C3 input as a co-directional clock signal is detected and the disconnection occurs, the clock prohibition control signal X2 is supplied to the clock prohibition unit. Output to 7,
A clock signal C3 as the PLO synchronization clock signal C4
By prohibiting the output of the PLO, the PLO 4 self-runs and outputs the PLO output clock signal C5 at the free-running frequency of the PLO 4.

As described above, in the conventional example, the section overhead signal multiplexing is performed by using the output clock signal at the free-running frequency of the PLO in which a large frequency fluctuation may occur due to the fluctuation of the ambient temperature, the power supply voltage and the like. However, in the present embodiment, a signal disconnection between the data signal D2 and the clock signal C3 input as the co-directional clock signal is detected, and when the disconnection occurs, the clock selection control signal X1.
Therefore, the clock selection unit 3 uses the in-device reference clock signal C2 from the highly stable in-device reference clock source 6 originally provided as a synchronous network transmission system for phase synchronization of the PLO4.

[0016]

As described above, according to the present invention, the circuit configuration section from the main signal data to the section overhead signal multiplexing section on the transmission end side becomes inoperative due to a failure or maintenance, and the section overhead signal multiplexing section If the main signal input data and the co-directional input clock signal are disconnected, use the output clock signal at the free-running frequency of the PLO that may cause large frequency fluctuations due to fluctuations in ambient temperature, power supply voltage, etc. In addition, without using a complicated and expensive PLO which eliminates such a problem, the PLO of the in-apparatus reference clock signal from the highly stable in-apparatus reference clock source originally provided as the synchronous network transmission system is used. By using it for phase synchronization, the section overhead signal is multiplexed with a highly stable clock signal, and It is possible to provide a clock supply method with improved reliability of the de signal transmission.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a block diagram showing an example of a conventional clock supply system.

[Explanation of symbols]

 A clock transfer unit B section overhead signal multiplexing unit 1 clock transfer memory unit 2 input clock loss detection unit 3 clock selection unit 4 PLO 5 section overhead signal insertion unit 6 internal reference clock source

Claims (2)

[Claims] 1. In a clock supply system of a section overhead signal multiplexing section on the transmission end side facing between stations of a synchronous network system compatible with synchronous digital hierarchy, disconnection of an input clock signal in the same direction as main signal input data And a second means for selecting and outputting one of the input clock signal and the in-apparatus reference clock signal based on the detection result of the first means, and the second means. A third means for outputting a clock signal phase-locked with the output signal and a fourth means for multiplexing the section overhead signal using the clock signal output by the third means are provided. Characteristic clock supply system. 2. The clock supply system according to claim 1, wherein the third means is a phase locked oscillator.