KR960003121A - Reed-Solomon Decoder - Google Patents

Reed-Solomon Decoder Download PDF

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KR960003121A
KR960003121A KR1019940013928A KR19940013928A KR960003121A KR 960003121 A KR960003121 A KR 960003121A KR 1019940013928 A KR1019940013928 A KR 1019940013928A KR 19940013928 A KR19940013928 A KR 19940013928A KR 960003121 A KR960003121 A KR 960003121A
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South Korea
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output signal
storing
storage means
counting
inputting
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KR1019940013928A
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Korean (ko)
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KR0155762B1 (en
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오영욱
김대영
최영운
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김광호
삼성전자 주식회사
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/1515—Reed-Solomon codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/1545—Determination of error locations, e.g. Chien search or other methods or arrangements for the determination of the roots of the error locator polynomial

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  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Algebra (AREA)
  • General Physics & Mathematics (AREA)
  • Pure & Applied Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Error Detection And Correction (AREA)

Abstract

본 발명은 리드-솔로몬 복호기를 공개한다. 그 회로는 수신된 데이타를 정정하기 시작하는 시점까지 저장하는 제1저장수단, 에러 위치 번호와 에러 값을 이용하여 에러 패턴을 생성하는 에러 패턴 생성수단, 상기 제1저장수단과 상기 에러 패턴 생성수단의 출력신호를 입력하여 갈로이스 필드상에서의 가산을 수행하는 제1가산수단, 상기 제1가산수단의 출력신호의 오증을 계산하는 오증 계산수단, 상기 오증 계산수단이 오증을 계산하는 동안 상기 제1가산수단의 출력 데이타를 저장하는 제2저장수단, 상기 에러 패턴 생성수단의 출력신호를 저장하는 제3저장수단, 상기 제2 제3저장수단의 출력신호를 입력하여 갈로이스 필드상에서의 가산을 수행하는 제2가산수단, 상기 오증 계산수단의 출력신호에 응답하여 상기 제3저장수단과 상기 제2가산수단의 출력신호를 선택적으로 출력하기 위한 선택수단으로 구성되어 있다. 따라서 효율적으로 에러를 정정할 수 있다.The present invention discloses a Reed-Solomon decoder. The circuit includes first storage means for storing the received data up to the point of time to start correcting, error pattern generating means for generating an error pattern using an error position number and an error value, the first storing means and the error pattern generating means. First adding means for performing an addition on the gallois field by inputting an output signal of; Second storage means for storing the output data of the adding means, third storage means for storing the output signal of the error pattern generating means, and output signals of the second third storage means for inputting on the galloise field; A selective number for selectively outputting an output signal of the third storage means and the second adding means in response to an output signal of the second adding means and the miscalculation means; It consists of stages. Therefore, the error can be corrected efficiently.

Description

리드-솔로몬 복호기Reed-Solomon Decoder

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 본 발명의 리드-솔로몬 복호기의 블럭도이다,1 is a block diagram of the Reed-Solomon decoder of the present invention.

제2도는 제1도에 나타낸 저장수단의 블럭도이다,2 is a block diagram of the storage means shown in FIG.

제3도는 제2도에 나타낸 제1저장수단의 블럭도이다.3 is a block diagram of the first storage means shown in FIG.

Claims (4)

수신된 데이타를 정정하기 시작하는 시점까지 저장하는 제1저장수단; 에러 위치 번호와 에러 값을 이용하여 에러 패턴을 생성하는 에러 패턴 생성수단; 상기 제1저장수단과 상기 에러 패턴 생성수단의 출력신호를 입력하여 갈로이스 필드상에서의 가산을 수행하는 제1가산수단; 상기 제1가산수단의 출력신호의 오증을 계산 하는 오증 계산수단; 상기 오증 계산수단이 오증을 계산하는 동안 상기 제1가산수단의 출력 데이타를 저장하는 제2저장수단; 상기 에러 패턴 생성수단의 출력신호를 저장하는 제3저장수단; 상기 제2, 제3저장수단의 출력신호를 입력하여 갈로이스 필드상에서외 가산을 수행하는 제2가산수단; 상기 오증 계산수단의 출력신호에 응답하여 상기 제3저장수단과 상기 제2가산수단의 출력신호를 선택적으로 출력하기 위한 선택수단을 구비한 것을 특징으로 하는 리드-솔로몬 복호기.First storage means for storing up to the time point at which the received data is corrected; Error pattern generating means for generating an error pattern using the error position number and the error value; First adding means for inputting the output signals of the first storing means and the error pattern generating means to perform addition on the galloise field; False positive calculation means for calculating a positive of the output signal of said first adding means; Second storage means for storing the output data of the first adding means while the fifth calculation means calculates the ohmic; Third storage means for storing an output signal of the error pattern generation means; Second addition means for inputting the output signals of the second and third storage means to perform addition on the gallois field; And selecting means for selectively outputting the output signals of the third storage means and the second adding means in response to the output signal of the miscalculation means. 제1항에 있어서, 상기 제3저장수단은 상기 에러위치를 입력하여 계수하기 위한 계수수단; 상기 계수수단의 출력신호를 입력하여 에러정정능력의 2배의 비트 데이타로 복호화하기 위한 디코딩 수단; 상기 에러 패턴 생성수단의 출력신호를 상기 디코딩 수단의 출력신호에 응답하여 저장하기 위한 제4저장수단; 상기 제4저장수단의 출력신호를 입력하여 저장하기 위한 제5저장수단; 상기 제5저장수단에 저장된 각각의 에러 패턴을 자리수별로 논리합하여 출력하기 위한 논리합수단을 구비한 것을 특징으로 하는 리드-솔로몬 복호기2. The apparatus of claim 1, wherein the third storing means comprises: counting means for inputting and counting the error position; Decoding means for inputting the output signal of the counting means and decoding the bit data at twice the error correction capability; Fourth storage means for storing the output signal of the error pattern generating means in response to the output signal of the decoding means; Fifth storage means for inputting and storing the output signal of the fourth storage means; Reed-Solomon decoder characterized in that it comprises a logical sum means for outputting each of the error pattern stored in the fifth storage means by the number of digits 제2항에 있어서, 상기 제4저장수단은 상기 디코딩 수단의 출력신호에 응답하여 상기 에러 패턴 생성수단의 출력신호를 저장하기 위한 레지스터로 구성된 것을 특징으로 하는 리드-솔로몬 복호기.3. The Reed-Solomon decoder according to claim 2, wherein the fourth storing means comprises a register for storing the output signal of the error pattern generating means in response to the output signal of the decoding means. 제2항에 있어서, 상기 제5저장수단은 상기 디코딩 수단의 출력신호를 데이타 비트수만큼 계수하기 위한 제1계수수단; 상기 계수수단의 출력신호를 저장하기 위한 레지스터; 클럭신호에 응답하여 상기 소정 비트수만큼 계수하기 위한 제2계수수단; 상기 레지스터와 상기 제2계수수단의 출력신호를 입력하여 가산하기 위한 가산 수단; 부호의 길이와 상기 가산수단의 출력신호를 입력하여 배타 논리합하기 위한 배타 논리합수단; 상기 배타 논리합수단의 출력신호를 논리합하기 위한 논리합수단; 상기 클럭신호에 응답하여 상기 제4저장수단의 출력신호를 저장하기 위한 레지스터; 상기 논리합수단의 출력신호에 응답하여 상기 레지스터의 출력신호와 0의 데이타를 선택적으로 출력하기 위한 선택수단을 구비하여 최종적인 출력을 발생하는 것을 특징으로 하는 리드-솔로몬 복호기.3. The apparatus of claim 2, wherein the fifth storage means comprises: first counting means for counting the output signal of the decoding means by the number of data bits; A register for storing an output signal of the counting means; Second counting means for counting the predetermined number of bits in response to a clock signal; Adding means for inputting and adding an output signal of said register and said second counting means; Exclusive logical sum means for inputting a length of a code and an output signal of said adding means for exclusive logical sum; Logical sum means for ORing the output signal of the exclusive logical sum means; A register for storing an output signal of the fourth storage means in response to the clock signal; And responsive means for selectively outputting the output signal of the register and zero data in response to the output signal of the logical sum means to generate a final output. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940013928A 1994-06-20 1994-06-20 Reed-solomon decoder enable to correct error KR0155762B1 (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100850553B1 (en) * 2006-11-30 2008-08-06 (주)제이알메디칼 Air dispenser of air cooler for medical device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100850553B1 (en) * 2006-11-30 2008-08-06 (주)제이알메디칼 Air dispenser of air cooler for medical device

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