KR950027936A - 감광수지(Photo Resist) 코팅 두께 조절방법 및 조절장치 - Google Patents

감광수지(Photo Resist) 코팅 두께 조절방법 및 조절장치 Download PDF

Info

Publication number
KR950027936A
KR950027936A KR1019940006029A KR19940006029A KR950027936A KR 950027936 A KR950027936 A KR 950027936A KR 1019940006029 A KR1019940006029 A KR 1019940006029A KR 19940006029 A KR19940006029 A KR 19940006029A KR 950027936 A KR950027936 A KR 950027936A
Authority
KR
South Korea
Prior art keywords
chamber
wafer
thickness
control device
high temperature
Prior art date
Application number
KR1019940006029A
Other languages
English (en)
Other versions
KR0171918B1 (ko
Inventor
배상만
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019940006029A priority Critical patent/KR0171918B1/ko
Priority to US08/408,393 priority patent/US5536534A/en
Priority to JP7065833A priority patent/JP2675766B2/ja
Priority to DE19511191A priority patent/DE19511191C2/de
Publication of KR950027936A publication Critical patent/KR950027936A/ko
Application granted granted Critical
Publication of KR0171918B1 publication Critical patent/KR0171918B1/ko

Links

Classifications

    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/16—Coating processes; Apparatus therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/312—Organic layers, e.g. photoresist

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Application Of Or Painting With Fluid Materials (AREA)
  • Coating Apparatus (AREA)

Abstract

본 발명은 반도체소자 제조공정중 리소그래피(Lithography) 제조공정에 관한 것으로, 특히 포트마스크 작업을 하기 위해 웨이퍼 위에 코팅된 감광수지(Photo resist)의 두께를 고온, 고압 조절장치를 사용하여 웨이퍼 패턴의 굴곡단차에 의한 감광수지의 코팅두께 유니포머티(Uniformity)를 개선시키는 방법 및 장치에 관한 것이다.

Description

감광수지(Photo Resist) 코팅 두께 조절방법 및 조절장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 본 발명에 따라 웨이퍼에 고온 고압을 인가하는 장치의 개략적인 단면도,
제3도는 본 발명의 방법에 의해 개선된 상태의 감광수지로 코팅된 웨이퍼의 단면도.

Claims (3)

  1. 반도체소자 제조공정중 웨이퍼 패턴상의 감광수지의 두께를 균일하게 형성하는 방법에 있어서, 고온, 고압 조절장치의 챔버내에 다수개의 웨이퍼들을 웨이퍼 카세트내에 장착시키되, 웨이퍼상의 패턴이 아래로 향하도록 장착한 상태에서 쳄버를 밀폐시키고, 히터를 사용하여 적절한 고온의 상태와 압력조절밸브를 이용하여 고온의 상태를 형성한 다음, 감광수지 두께를 조절하도록 한 것을 특징으로 하는 감광수지 두께 조절방법.
  2. 제1항에 있어서, 상기 쳄버내의 압력은 질소가스를 사용하여 고압으로 형성하는 것을 특징으로 하는 감과수지 두께 조절방법.
  3. 밀폐된 공간을 형성하는 쳄버와, 상기 쳄버의 양측벽에 설치되어 온도를 조절할 수 있도록 한 히터와, 쳄버내에 위치하며 다수개의 웨이퍼를 수용하는 웨이퍼 카세트와, 상기 웨이퍼 카세트를 지지하는 카세트 지지대 및압력을 조절하는 압력조절단자로 구성되어 웨이퍼의 패턴상에 균일한 감광수지의 두께를 형성하는 것을 특징으로 하는 감광수지 코팅 두께 조절방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019940006029A 1994-03-25 1994-03-25 감광수지 코팅 두께 조절방법 및 조절장치 KR0171918B1 (ko)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1019940006029A KR0171918B1 (ko) 1994-03-25 1994-03-25 감광수지 코팅 두께 조절방법 및 조절장치
US08/408,393 US5536534A (en) 1994-03-25 1995-03-22 Method and apparatus for coating photoresist
JP7065833A JP2675766B2 (ja) 1994-03-25 1995-03-24 フォトレジスト塗布方法及びその装置
DE19511191A DE19511191C2 (de) 1994-03-25 1995-03-27 Verfahren zum Auftragen eines lichtempfindlichen Gemisches sowie Vorrichtung hierfür

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940006029A KR0171918B1 (ko) 1994-03-25 1994-03-25 감광수지 코팅 두께 조절방법 및 조절장치

Publications (2)

Publication Number Publication Date
KR950027936A true KR950027936A (ko) 1995-10-18
KR0171918B1 KR0171918B1 (ko) 1999-03-30

Family

ID=19379586

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940006029A KR0171918B1 (ko) 1994-03-25 1994-03-25 감광수지 코팅 두께 조절방법 및 조절장치

Country Status (4)

Country Link
US (1) US5536534A (ko)
JP (1) JP2675766B2 (ko)
KR (1) KR0171918B1 (ko)
DE (1) DE19511191C2 (ko)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR0154164B1 (ko) * 1994-07-11 1998-12-01 김주용 반도체소자의 제조방법
KR100193899B1 (ko) 1996-06-29 1999-06-15 김영환 반도체 소자의 감광막 형성장치 및 이를 이용한 감광막 형성방법
US6177133B1 (en) 1997-12-10 2001-01-23 Silicon Valley Group, Inc. Method and apparatus for adaptive process control of critical dimensions during spin coating process
KR19990055771A (ko) * 1997-12-27 1999-07-15 김영환 감광막 형성방법
US20100151118A1 (en) * 2008-12-17 2010-06-17 Eastman Chemical Company Carrier solvent compositions, coatings compositions, and methods to produce thick polymer coatings
CN109390209B (zh) * 2017-08-03 2021-04-13 无锡华润上华科技有限公司 一种半导体器件及其制造方法和电子装置
CN109158271A (zh) * 2018-09-13 2019-01-08 长沙格力暖通制冷设备有限公司 散热膏涂覆工装及电子功率元器件加工组装的辅助工装

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0203931B1 (en) * 1984-10-29 1989-03-29 AT&T Corp. Method of producing devices using nonplanar lithography
DE4228344C2 (de) * 1992-08-26 1999-06-10 Inst Chemo U Biosensorik E V Verfahren zur Photoresistbeschichtung von mikromechanisch dreidimensional strukturierten Bauteilen in der Mikrostrukturtechnik sowie Vorrichtung zur Durchführung des Verfahrens
KR970009977B1 (en) * 1994-02-03 1997-06-19 Hyundai Electronics Ind Method of deposisting a photoresist in the semiconductor device

Also Published As

Publication number Publication date
DE19511191A1 (de) 1995-09-28
JPH0862849A (ja) 1996-03-08
DE19511191C2 (de) 1997-09-04
JP2675766B2 (ja) 1997-11-12
KR0171918B1 (ko) 1999-03-30
US5536534A (en) 1996-07-16

Similar Documents

Publication Publication Date Title
KR950027936A (ko) 감광수지(Photo Resist) 코팅 두께 조절방법 및 조절장치
KR100601979B1 (ko) 반도체 웨이퍼의 베이킹 장치
KR100324440B1 (ko) 치수 정밀도가 높은 포토마스크를 형성할 수 있는 포토마스크형성 방법 및 열처리장치
TWI682481B (zh) 減壓乾燥裝置、基板處理裝置及減壓乾燥方法
KR100549953B1 (ko) 스피너설비의 베이크장치
JP5269743B2 (ja) 半導体製造プロセス及びその装置
KR100291331B1 (ko) 반도체소자의제조장비및이를이용한반도체소자의패턴형성방법
JPH07142356A (ja) レジスト・パターン形成方法およびこれに用いるレジスト・パターン形成システム
KR100510448B1 (ko) 열적 흐름 공정을 이용한 반도체장치의 미세 포토레지스트 패턴형성방법
JP3631131B2 (ja) シリル化処理装置及びシリル化処理方法
JPH0637006A (ja) 半導体処理装置
JP2011066119A (ja) 半導体装置の製造装置および製造方法
KR20000033084A (ko) 기판 온도 조절용 플레이트 및 그 제조방법
JP4431307B2 (ja) 熱板オーブン及びこれを利用するフォトレジストパターン形成方法
JP3623369B2 (ja) 半導体製造装置
KR19990034784A (ko) 노광장비의 척부
KR100599927B1 (ko) 포토마스크 제작용 레지스트 베이크 장치
KR100741878B1 (ko) 노광후 베이킹 장치
KR20060028869A (ko) 반도체 제조설비의 베이크장치
KR100200296B1 (ko) 반도체소자의미세패턴형성방법
KR19990065312A (ko) 반도체 소자 제조를 위한 베이크 장치
KR200277176Y1 (ko) 반도체제조공정용포토레지스트제거장치
KR20030056018A (ko) 포토 마스크 제조방법
KR20050033686A (ko) 레지스트 플로우 공정용 핫 플레이트 오븐
KR950019916A (ko) 감광막의 미세 패턴 형성방법

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20060920

Year of fee payment: 9

LAPS Lapse due to unpaid annual fee