KR950006131Y1 - Semiconductor package lead frame - Google Patents

Semiconductor package lead frame Download PDF

Info

Publication number
KR950006131Y1
KR950006131Y1 KR92019701U KR920019701U KR950006131Y1 KR 950006131 Y1 KR950006131 Y1 KR 950006131Y1 KR 92019701 U KR92019701 U KR 92019701U KR 920019701 U KR920019701 U KR 920019701U KR 950006131 Y1 KR950006131 Y1 KR 950006131Y1
Authority
KR
South Korea
Prior art keywords
die paddle
lead frame
mounting portion
semiconductor package
element mounting
Prior art date
Application number
KR92019701U
Other languages
Korean (ko)
Other versions
KR940011119U (en
Inventor
김영선
Original Assignee
문정환
엘지일렉트론 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 문정환, 엘지일렉트론 주식회사 filed Critical 문정환
Priority to KR92019701U priority Critical patent/KR950006131Y1/en
Publication of KR940011119U publication Critical patent/KR940011119U/en
Application granted granted Critical
Publication of KR950006131Y1 publication Critical patent/KR950006131Y1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads

Abstract

내용 없음.No content.

Description

반도체 패키지용 리드프레임Leadframes for Semiconductor Packages

제 1 도는 일반적인 반도체 패키지용 리드프레임의 구조를 보인 평면도.1 is a plan view showing the structure of a lead frame for a general semiconductor package.

제 2 도 및 제 3 도는 본 고안에 의한 반도체 패키지용 리드프레임의 구조를 보인 도면으로서, 제 2 도는 본 고안 리드프레임의 평면도.2 and 3 are views showing the structure of a lead frame for a semiconductor package according to the present invention, Figure 2 is a plan view of the lead frame of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1, 1' : 사이드레일 2 : 다이패들1, 1 ': side rail 2: die paddle

3, 3' : 타이바 4 : 신호연결리드3, 3 ': tie bar 4: signal connection lead

5 : 댐바 11 : 다이패들프레임부5: dam bar 11: die paddle frame portion

12 : 소자탑재부 13 : 지지간12: element mounting portion 13: support between

본 고안은 반도체 패키지용 리드프레임, 특히 최근 연구개발되고 있는 플라스틱 고체촬상소자(CCD)패키지에 유용하게 적용할수 있도록 한 리드프레임의 구조에 관한 것으로, 더욱 구체적으로는 다이패들(Die Paddle)을 계단식 다층구조로 하여 몰딩(Molding)시 글래스리드(Glass Iid)를 탄력지지하게 함으로써 글래스리드의 밀착성을 보다 향상시키고, 글래스리드의 상부면을 몰드수지가 넘치는 것을 방지하며, 몰드수지의 분사압력에 의한 다이패들의 밀림으로 야기되는 개별리드들의 변형을 방지하도록 한 반도체 패키지용 리드프레임에 관한 것이다.The present invention relates to a structure of a lead frame for semiconductor package, in particular, a lead frame that can be usefully applied to a plastic solid-state imaging device (CCD) package that is being recently researched and developed. More specifically, a die paddle The stepped multi-layered structure enables glass lids to elastically support during molding, further improving the adhesion of the glass lids, preventing the upper surface of the glass lids from overflowing the mold resins, and reducing the injection pressure of the mold resins. The present invention relates to a lead frame for a semiconductor package which prevents deformation of individual leads caused by the die padding.

일반적으로 반도체 패키지 제도에 사용되는 리드프레임은 제 1 도에 도시한 바와같이 양 사이드레일(Side rail)(1)(1')의 내측 중앙에 반도체칩이 부착되는 다이패들(2)이 타이바(Tie bar)(3)(3')에 의하여 지지되고, 상기 칩에 와이어본딩되는 다수개의 신호연결리드(4)들은 양 사이드레일(1)(1')을 연결하는 댐바(Dam bar)(5)에 의하여 지지되어 상기 다이패들(2)에 인접하게 배열된 구조로 되어 있다.In general, as shown in FIG. 1, a lead frame used in a semiconductor package system includes a die paddle 2 having a semiconductor chip attached to an inner center of both side rails 1 and 1 ′. A plurality of signal connection leads 4 supported by tie bars 3 and 3 'and wire-bonded to the chip are connected to both side rails 1 and 1'. It is supported by (5) and has a structure arranged adjacent to the die paddle (2).

이와같이된 리드프레임의 다이패들(2)에는 반도체칩이 부착되어 그 칩의 신호패드와 리드프레임의 각 신호연결리드(4)들은 금속와이어에 의해 전기적으로 접속연결되며, 이와같이된 칩과 리드프레임의 리드(4)를 포함하는 일정면적이 몰드수지로 몰딩되는 것에 의하여 반도체 패키지를 제조하게 되는 것이다.A semiconductor chip is attached to the die paddle 2 of the lead frame as described above, and the signal pads of the chip and the signal connection leads 4 of the lead frame are electrically connected and connected by metal wires. The semiconductor package is manufactured by molding a predetermined area including the lead 4 into the mold resin.

그러나, 일반적인 리드프레임은 상기한 바와같은 일반적인 반도체 패키지를 제조하는데는 유용하게 사용되나, 최근 빠르게 연구 개발되고 있는 원가절감형 플라스틱 고체촬상소자 패키지의 제조시에는 매우 부적합한 것이었다.However, the general lead frame is useful for manufacturing a general semiconductor package as described above, but it is very unsuitable for manufacturing a cost-saving plastic solid-state image package which is being recently researched and developed.

부연하면, 최근 연구개발되고 있는 플라스틱 고체촬상소자 패키지는 고가의 세라믹 바디의 사용을 배제하고, 소정형상의 리드프레임에 소자를 탑재하여 일반 패키지 제조공정과 동일한 방법으로 와이어본딩하고 이와같이된 소자의 수광영역부주위에 소정높이의 수광영역보호용 벽체를 형성한 후 글래스리드를 탑재하여 플라스틱 몰드수지로트랜스퍼 몰딩하는 구조의 원가절감형 플라스틱 고체촬상소자 패키지가 연구개발되고 있는 바, 이과정에서 트랜스퍼 몰딩시 글래스리드가 상부몰드금형의 윗부분과 정확하게 일치하지 않게되는 문제가 발생되었고, 더우기 몰드수지의 분사압력에 의해 글래스래드가 하측으로 밀리면서 글래스리드의 표면에 몰드수지가 덮히는 문제 뿐만아니라 다이패들의 밀림으로 인한 리드프레밍의 개별리드가 변형되는 문제등이 야기되었다.In other words, the plastic solid-state imaging device package recently researched and developed excludes the use of an expensive ceramic body, mounts the device in a lead frame of a predetermined shape, wire-bonds the same method as a general package manufacturing process, and receives the device. A cost-saving plastic solid-state imaging device package, in which a light-receiving area protection wall of a predetermined height is formed around the area and then mounted with glass lids, and then molded with a plastic mold resin, is being researched and developed. The problem is that the lead does not exactly coincide with the upper part of the upper mold mold, and the mold resin is covered on the surface of the glass lid as well as the glass resin is pushed downward by the injection pressure of the mold resin. Due to deformation of individual leads of lead framing The lanterns were caused.

따라서 플르스틱 고체촬상소자 패키지를 제조함에 있어서는 몰딩시 글래스리드를 탄력지지하는 수단이 필요하게 되었다.Therefore, in manufacturing a plastic solid-state imaging device package, a means for elastically supporting the glass lid during molding is required.

이를 감안하여 안출한 본 고안의 목적은 리드프레임의 다이패들을 계단식 다층구조로 함으로써 그 상부에 탑재되는 글래스리드를 소정의 리드프레임을 제공함에 있다.An object of the present invention devised in view of this is to provide a predetermined lead frame for the glass lead mounted on the upper part by the die pad of the lead frame in a stepped multilayer structure.

상기와 같은 본 고안의 목적을 달성하기 위하여 사이드레일의 내측에 반도체칩이 부착고정되는 다이패들이 타이바에 의하여 지지되고, 상기 칩에 와이어본딩되는 다수개의 신호연결리드들은 댐바에 의하여 다이패들의 주변에 인접하게 지지배열된 반도체 패키지용 리드프레임에 있어서, 상기 다이패들을 다이패들프레임부와 소자탑재부로 분할형성함과 아울러 다이패들프레임부와 소자탑재부를 수개의 지지간으로 연결하여 계단식 다층 구조로 하고, 상기 다이패들프레임부를 지지하는 타이바 및 소자탑재부를 지지하는 수개의 지지간을 적어도 2단계 이상으로 절곡형성하여 소자탑재부에 탄력을 줌으로써 플라스틱 고체촬상소자 패키지에 적용할 수 있도록 한 반도체 패키지용 리드프레임이 제공된다.In order to achieve the object of the present invention as described above, the die pads in which the semiconductor chip is fixed to the inside of the side rail are supported by tie bars, and the plurality of signal connection leads wire-bonded to the chips are surrounded by the dam pads. In a lead frame for a semiconductor package arranged adjacent to a support structure, the die paddle is divided into a die paddle frame portion and an element mounting portion, and the die paddle frame portion and the element mounting portion are connected by several supports to form a stepped multilayer. Structure, and the tie bar for supporting the die paddle frame portion and several supports for supporting the element mounting portion is bent in at least two stages to give elasticity to the element mounting portion so that it can be applied to a plastic solid-state imaging device package. A leadframe for a semiconductor package is provided.

상기와 같은 본 고안에 계단식 다이패들 구조를 갖는 반도체 패키지용 리드프레임은 다이패들의 소자탑재부에 탄력을 줌으로써 그의 상부에 탑재된 글래스리드를 소정의 압력으로 탄력지지하여 플라스틱 고체촬상소자 패키지의 몰드공정시 몰드수지의 분사압력을 상쇄시키므로 글래스리드와 상부몰드금형의 경계면이 정확하게 일치하게 되고, 글래스리드의 밀착성이 향상되며, 글래스리드의 표면으로 몰드수지가 넘치는 것을 방지할수 있다는 효과가 있고, 리드프레임의 개별리드의 변형을 방지할 수 있다는 등의 효과가 있다.The lead frame for a semiconductor package having a stepped die paddle structure according to the present invention as described above provides elasticity to the device mounting portion of the die paddle to elastically support the glass lid mounted thereon at a predetermined pressure to mold the plastic solid state image package. Since the injection pressure of the mold resin is canceled during the process, the interface between the glass lid and the upper mold mold is exactly matched, the adhesion of the glass lid is improved, and the surface of the glass lid can prevent the mold resin from overflowing. There is an effect that the deformation of the individual leads of the frame can be prevented.

이하, 상기한 바와같은 본 고안에 의한 반도체 패키지용 리드프레임을 첨부도면에 의거하여 보다 상세히 설명한다.Hereinafter, the lead frame for a semiconductor package according to the present invention as described above will be described in more detail with reference to the accompanying drawings.

제 2 도는 본 고안에 의한 반도체 패키지용 리드프레임의 구조를 보인 평면도이고, 제 3 도는 제 2 도의 A-A선 단면도로서 이에 도시한 바와같이 본 고안 반도체 패키지용 리드프레임은 사이드레일(1)(1')의 내측에 반도체 칩이 부착고정되는 다이패들(2)이 타이바(3)(3')에 의하여 지지되고, 상기반도체칩에 와이어본딩되는 다수개의 신호연결리등(4)들은 댐바(5)에 의하여 다이패들(2)의 주변에 인접하게 지지배열된 반도체 패키지용 리드프레임에 있어서, 상기 다이패들(2)을 다이패들프레임부(11)와 소자탑재부(12)로 분할형성함과 아울러 다이패들프레임부(11)를 지지하는 타이바(3)(3') 및 소자탑재부(12)를 지지하는 수개의 지지간(13)을 적어도 2단계 이상으로 절곡형성하여 소자탑재부(12)에 탄력을 줌으로써 플라스틱 고체촬상소자 패키지의 몰드공정시 글래스리드를 탄력지지하도록 구성함을 특징으로 하고있다.FIG. 2 is a plan view showing the structure of a lead frame for a semiconductor package according to the present invention, and FIG. 3 is a cross-sectional view taken along the line AA of FIG. 2. As shown therein, the lead frame for a semiconductor package according to the present invention has a side rail (1) (1 '). The die paddle 2 to which the semiconductor chip is attached and fixed to the inner side is supported by the tie bars 3 and 3 ', and the plurality of signal connection lights 4 wire-bonded to the semiconductor chip are connected to the dam bar. In the lead package for a semiconductor package arranged adjacent to the periphery of the die paddle 2 by 5), the die paddle 2 is divided into a die paddle frame portion 11 and an element mounting portion 12. In addition, the tie bars (3) (3 ') for supporting the die paddle frame portion (11) and several support rods (13) for supporting the element mounting portion (12) are bent to form at least two or more steps. By giving elasticity to the mounting portion 12, the glass during the mold process of the plastic solid-state image pickup device package And it is characterized in that the resilient support structure of the lead.

이와같이된 본 고안에 의한 계단식 다층구조의 다이패들을 갖는 리드프레임을 이용하여 프라스틱 고체촬상소자 패키지를 제조하는 고용은, 상술한 플라스틱 고체촬상소자 패키지 제조공정, 즉 리드프레임의 다이패들(2)에 반도체칩(고체촬상소자)을 탑재하여 주변의 신호연결리드(4)들과 금속와이어로 연결하고, 이와같이된 칩과 리드프레임의 리드(4)를 포함하는 일정면적을 몰드수지로 트랜스퍼 몰딩한 후 트립 및 포밍공정을 행하는 공정은 동일하나, 본 고안의 리드프레임에 의하면, 몰딩공정시 계단식 다층구조의 다이패들(2)에 의해 그의 소자탑재부(12)에 탑재된 소자 및 글래스리드가 소정의 힘으로 탄력지지되므로, 종래와 같은 글래스리드와 금형경계면과의 불일치 및 몰드수지 분사압력에 의한 다이패들의 밀림으로 야기되는 리드프레임 개별리드들의 변형을 방지할 수 있고, 글래스리등의 밀착성이 향상될 뿐만아니라 글래스리드의 표면으로 몰드수지가 넘쳐 글래스리드를 덮어 버리는 문제를 해소할 수 있은 것이다.The employment of manufacturing a plastic solid-state image pickup device package using a leadframe having a stepped multilayer paddle according to the present invention is the above-described plastics solid-state image pickup package manufacturing process, that is, the lead paddles 2 The semiconductor chip (solid-state image pickup device) is mounted on the circuit board, and the peripheral signal connection leads 4 are connected to the metal wire, and a predetermined area including the chip and the lead frame 4 of the lead frame is transferred and molded with a mold resin. The process of carrying out the post-trip and forming process is the same, but according to the lead frame of the present invention, the element and glass lid mounted on the element mounting portion 12 by the stepped die paddle 2 in the molding process are predetermined. Since it is elastically supported by the force of the lead frame, the lead frame caused by the mismatch between the glass lead and the mold boundary surface and the die paddle push due to the injection pressure of the mold resin The deformation of the leads can be prevented, and the adhesion of the glass lid is improved, and the problem of covering the glass lid by overflowing the mold resin on the surface of the glass lid can be solved.

이상에서 상세히 설명한 바와같이, 본 고안에 의한 리드프레임은 다이패들을 계단식 다층구조로 함과 아울러 탄력을 줌으로써 최근 연구개발되고 있는 플라스틱 고체촬상소자 패키지에 매유 유리하게 적용할 수 있다는 효과가 있는 것인 바, 예를 들면, 플라스틱 고체촬상소자 패키지 제조공정의 몰드공정시 글래스리드를 탄력지지함으로써 몰드수지의 분사압력을 상쇄시키므로 글래스리드와 상부몰드금형의 경계면이 보다 정확하게 일치하게 되고, 글래스리드의 밀착성이 향상되며, 글래스리드의 표면으로 몰드수지가 넘치는 것을 방지할 수 있다는 효과가 있고, 다이패들의 소자탑재부가 완충작용을 하게 되므로 리드프레임의 개별리드의 변형을 방지할 수 있다는 등의 효과가 있는 것이다.As described in detail above, the lead frame according to the present invention has an effect that it can be advantageously applied to the plastic solid-state imaging device package that is being recently researched and developed by giving the die pads a stepped multilayer structure and elasticity. Bars, for example, by offsetting the injection pressure of the mold resin by elastically supporting the glass lid during the molding process of the plastic solid-state imaging device package manufacturing process, the interface between the glass lid and the upper mold mold more accurately matches, the adhesion of the glass lid This improves the effect of preventing the overflow of the mold resin onto the surface of the glass lid, and the effect of the element mounting portion of the die paddle to prevent deformation of individual leads of the lead frame. will be.

Claims (1)

사이드레일(1)(1')의 내측에 반도체 칩이 부착고정되는 다이패들(2)이 타이바(3)(3')에 의하여 지지되고, 상기 칩에 와이어본딩되는 다수개의 신호연결리등(4)들은 댐바(5)에 의하여 다이패들(2)의 주변에 인접하게 지지배열된 반도체 패키지용 리드프레임에 있어서, 상기 다이패들(2)을 다이패들프레임부(11)와 소자탑재부(12)로 분할형성함과 아울러 다이패들프레임부(11)와 소자탑재부(12)를 수개의 지지간(13)으로 연결하여 계단식 다층구조로 하고, 상기 다이패들프레임부(11)를 지지하는 타이바(3)(3')및 소자탑재부(12)를 지지하는 수개의 지지간(13)을 적어도 2단계 이상으로 절곡형성하여 소자탑재부(12)에 에 탄력을 줌으로써 플라스틱 고체촬상소자 패키지의 몰드공정시 글래스리드를 탄력지지하도록 구성한것을 특징으로 하는 반도체 패키지용 리드프레임.The die paddle 2, in which the semiconductor chip is fixed to the inside of the side rails 1, 1 ', is supported by the tie bars 3, 3', and a plurality of signal connection wires are wire-bonded to the chip. The backs 4 are arranged in a lead frame for a semiconductor package that is arranged adjacent to the periphery of the die paddle 2 by a dam bar 5, and the die paddle 2 is connected to the die paddle frame portion 11. The element mounting portion 12 is divided into parts, and the die paddle frame portion 11 and the element mounting portion 12 are connected by several supporting sections 13 to form a stepped multilayer structure, and the die paddle frame portion 11 ), The tie bars (3) (3 ') supporting the element and several support bars (13) supporting the element mounting portion (12) are bent in at least two stages to give elasticity to the element mounting portion (12). A lead frame for a semiconductor package, characterized in that configured to elastically support the glass lead during the mold process of the image pickup device package.
KR92019701U 1992-10-13 1992-10-13 Semiconductor package lead frame KR950006131Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR92019701U KR950006131Y1 (en) 1992-10-13 1992-10-13 Semiconductor package lead frame

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR92019701U KR950006131Y1 (en) 1992-10-13 1992-10-13 Semiconductor package lead frame

Publications (2)

Publication Number Publication Date
KR940011119U KR940011119U (en) 1994-05-27
KR950006131Y1 true KR950006131Y1 (en) 1995-07-29

Family

ID=19341724

Family Applications (1)

Application Number Title Priority Date Filing Date
KR92019701U KR950006131Y1 (en) 1992-10-13 1992-10-13 Semiconductor package lead frame

Country Status (1)

Country Link
KR (1) KR950006131Y1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010045637A (en) * 1999-11-05 2001-06-05 마이클 디. 오브라이언 Semiconductor package

Also Published As

Publication number Publication date
KR940011119U (en) 1994-05-27

Similar Documents

Publication Publication Date Title
EP0623956A2 (en) A semiconductor device having no die supporting surface and method for making the same
US20040016994A1 (en) Semiconductor package and fabricating method thereof
JPH0685222A (en) Solid-state image sensing device
US20040217450A1 (en) Leadframe-based non-leaded semiconductor package and method of fabricating the same
CN1692501A (en) Optical sensor package
KR960009136A (en) Semiconductor package and manufacturing method
KR940001333A (en) Resin-sealed solid state image pickup device package and manufacturing method thereof
KR950006131Y1 (en) Semiconductor package lead frame
US6737737B1 (en) Semiconductor package with chip supporting member
KR950008852B1 (en) Pccd type leadframe and method
KR0124790B1 (en) Integrated circuit package of surface mounting type
KR200148634Y1 (en) Semiconductor package
KR970008530A (en) Surface-mount leadframes, semiconductor packages using the same, and manufacturing methods thereof
KR100632256B1 (en) Lead-on Chip Lead Frame with Dummy Leads
JPH09199639A (en) Semiconductor device and its formation
KR100239685B1 (en) Semiconductor package structure and its manufacturing method
KR960003855B1 (en) Mold encapsulation semiconductor and lead frame
KR100193228B1 (en) Semiconductor package structure
KR0156335B1 (en) A semiconductor chip package using a tie bar
KR200224097Y1 (en) Molding die
KR200245729Y1 (en) Semiconductor Package Structure
KR970067797A (en) Package with adhesive resin spill preventing dam on top of die pad
JPH039538A (en) Resin seal metal mold for semiconductor device
KR200187484Y1 (en) Semiconductor package
KR0176113B1 (en) Lead frame and semiconductor package

Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
REGI Registration of establishment
FPAY Annual fee payment

Payment date: 20040618

Year of fee payment: 10

LAPS Lapse due to unpaid annual fee