KR950005694Y1 - Device which switch image signal synchronously in a security system - Google Patents
Device which switch image signal synchronously in a security system Download PDFInfo
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- KR950005694Y1 KR950005694Y1 KR2019910014545U KR910014545U KR950005694Y1 KR 950005694 Y1 KR950005694 Y1 KR 950005694Y1 KR 2019910014545 U KR2019910014545 U KR 2019910014545U KR 910014545 U KR910014545 U KR 910014545U KR 950005694 Y1 KR950005694 Y1 KR 950005694Y1
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- channel
- multiplexer
- security system
- signal
- image signal
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/18—Closed-circuit television [CCTV] systems, i.e. systems in which the video signal is not broadcast
- H04N7/181—Closed-circuit television [CCTV] systems, i.e. systems in which the video signal is not broadcast for receiving images from a plurality of remote sources
-
- G—PHYSICS
- G08—SIGNALLING
- G08B—SIGNALLING OR CALLING SYSTEMS; ORDER TELEGRAPHS; ALARM SYSTEMS
- G08B13/00—Burglar, theft or intruder alarms
- G08B13/18—Actuation by interference with heat, light, or radiation of shorter wavelength; Actuation by intruding sources of heat, light, or radiation of shorter wavelength
- G08B13/189—Actuation by interference with heat, light, or radiation of shorter wavelength; Actuation by intruding sources of heat, light, or radiation of shorter wavelength using passive radiation detection systems
- G08B13/194—Actuation by interference with heat, light, or radiation of shorter wavelength; Actuation by intruding sources of heat, light, or radiation of shorter wavelength using passive radiation detection systems using image scanning and comparing systems
- G08B13/196—Actuation by interference with heat, light, or radiation of shorter wavelength; Actuation by intruding sources of heat, light, or radiation of shorter wavelength using passive radiation detection systems using image scanning and comparing systems using television cameras
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Studio Circuits (AREA)
Abstract
내용 없음.No content.
Description
제 1 도는 종래의 시큐리티 시스템에서의 순차절환장치를 보인 개략도.1 is a schematic view showing a sequential switching device in a conventional security system.
제 2 도는 본 고안에 의한 동기식 순차절환장치를 설명하기 위한 개략도.2 is a schematic view for explaining a synchronous sequential switching device according to the present invention.
제 3 도는 본 고안을 채용한 동기식 순차절환장치를 보인 구성도.3 is a block diagram showing a synchronous sequential switching device employing the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
1-8 : 메모리부 9 : A/D컨버터1-8: Memory 9: A / D Converter
10 : 메모리 IC 11 : D/A컨버터10: memory IC 11: D / A converter
12 : 동기분리회로 13 : 콘트롤러12: synchronous separation circuit 13: controller
14 : 멀티플렉서 15 : 마이컴14: Multiplexer 15: Microcomputer
16 : 내부 동기 발생회로 17 : 모니터16: internal synchronization generating circuit 17: monitor
본 고안은 시큐리티 시스템의 영상신호 순차절환장치에 있어서, 모니터의 화면을 비동기에 의한 일그러짐 없이 자연스럽게 재생할 수 있도록 한 시큐리티 시스템의 동기식 영상신호 순차 절환장치에 관한 것이다.The present invention relates to a synchronous video signal sequential switching device of a security system in which a video signal sequential switching device of a security system can naturally reproduce a screen of a monitor without asynchronous distortion.
종래에는 제 1 도에 도시된 바와같이 감시카메라(도면 미도시)에 연결된 각 채널(CH1-CH4)을 통해 인입되는 영상신호를 멀티플렉서에서 마이컴의 제어에 따라 일정한 주기로 절환시켜 각 채널의 영상신호가 순차적으로 모니터에서 재생되도록 한 것이다.Conventionally, as shown in FIG. 1, an image signal input through each channel (CH 1 to CH 4 ) connected to a surveillance camera (not shown) is switched at a predetermined period under the control of a microcomputer in the multiplexer, thereby allowing the image of each channel. The signals are played back sequentially on the monitor.
그러나 이러한 영상신호 순차절환장치는 각각의 채널을 통해 들어오는 영상신호의 동기신호가 서로 일치하지 않기 때문에 한 채널에서 다른 채널로 절환되는 순간 모니터의 영상은 비동기 노이즈에 의해 잠시동안 일그러지거나 무너지는 현상이 나타나게 되므로 모니터를 통해 감시하는 사용자가 화면의 순간적 일그러짐에 의해서 쉽게 눈의 피로를 느끼게 되는 문제점이 있는 것이다.However, since the video signal sequential switching device does not coincide with the synchronization signal of the video signal coming through each channel, the video of the monitor is distorted or collapsed for a while by asynchronous noise when switching from one channel to another. Since it appears, the user who monitors through the monitor is a problem that the eye easily feels tired by the momentary distortion of the screen.
본 고안은 상기 문제점을 해결하기 위하여 안출된 것으로서 각 채널을 통해 인입되는 영상신호가 하나의 동기신호에 따라 모니터로 출력되도록 함으로써 한 채널에서 다른 채널로 절환되는 순간에도 화면이 일그러지지 않고 자연스럽게 디스플레이 되도록 하여 시각에 자극을 받지 않고 모니터를 주시할 수 있도록 한 것이다.The present invention is designed to solve the above problems, so that the video signal input through each channel is output to the monitor according to one synchronization signal so that the screen is naturally displayed without distortion even when switching from one channel to another channel. This is to monitor the monitor without being irritated to the visual.
이를 첨부된 도면에 의해 상세히 설명하면 다음과 같다.This will be described in detail with reference to the accompanying drawings.
각 채널(CH1-CH8)을 멀티플렉서(14)의 입력단자(In1-Ins)에 연결하고, 마이컴(15)의 제어단자(A)(B)(C)에 상기 멀티플렉서(14)의 셀렉터 단자(A′)(B′)(C′)를 접속하여서 된 공지의 것에 있어서, A/D컨버터(9), 메모리IC(10), D/A컨버터(11), 동기분리회로(12) 및 콘트롤러(13)로 이루어진 각각의 메모리부(1-8)를 각 채널(CH1-CH8)과 멀티플렉서(14)의 입력단자(In1-Ins) 사이에 접속하여서 된 것으로서 미설명부호 B1-B3은 버퍼이다.Each channel CH 1 -CH 8 is connected to the input terminals In 1 -In s of the multiplexer 14, and the multiplexer 14 is connected to the control terminals A, B, and C of the microcomputer 15. In the well-known thing by connecting the selector terminals A '(B') (C ') of the A / D converter 9, the memory IC 10, the D / A converter 11, the synchronous separation circuit ( 12) and the respective memory sections 1-8 composed of the controller 13 are connected between the respective channels CH 1 -CH 8 and the input terminals In 1 -In s of the multiplexer 14. Explanation B 1- B 3 are buffers.
이와 같이 구성된 본 고안의 작용효과를 설명하면 다음과 같다.Referring to the effect of the present invention configured as described above are as follows.
각각의 비디오 카메라(도면미도시)를 통해 각 채널(CH1-CH8)로 입력되는 비디오영상신호가 일단은 버퍼(B1-BS)를 거치면서 적절한 진폭으로 증폭감쇄 되거나 임피던스 매칭된 후 A/D 컨버터(9)에서 소정의 디지탈신호로 변환된다.After the video signal inputted to each channel (CH 1 -CH 8 ) through each video camera (not shown) is first amplified, attenuated or impedance matched through the buffer (B 1 -B S ), The A / D converter 9 converts it into a predetermined digital signal.
한편 동기분리회로(12)에서 인가된 영상신호중의 수직동기신호와 수평동기신호를 분리하여 콘트롤러(13)에 인가하고 콘트롤러(13)는 이러한 동기신호에 맞추어 A/D 변환된 디지탈 신호를 메모리 IC(10)에 라이트(Write)하게 되는 것이어서 화면재생에 필요한 형태로 영상 데이타가 저장되는 것이다.On the other hand, the vertical synchronizing signal and the horizontal synchronizing signal among the image signals applied by the synchronizing separation circuit 12 are applied to the controller 13, and the controller 13 applies the A / D converted digital signal in accordance with the synchronizing signal to the memory IC. The data is written to (10) so that image data is stored in a form necessary for screen reproduction.
즉, 각각의 카메라(도면미도시)에서 출력되는 각 채널(CH1-CH8)의 비디오 영상신호는 나름대로 수평, 수직 동기신호를 갖고 있으나 이들은 각 콘트롤러(13)에 의하여 메모리 IC(10)의 소정번지에 일단 저장되어 있는 것이며, 이러한 상태에서 마이콤(15)은 내부 동기발생회로(16)에서 발생되는 내부 동기신호를 참조하여 각 콘트롤러(13)에 순차로 리드(Read)명령을 가하게 되는 것이다.That is, the video image signal of each channel (CH 1 to CH 8 ) output from each camera (not shown) has horizontal and vertical synchronization signals in its own way, but these are controlled by each controller 13 of the memory IC 10. In this state, the microcomputer 15 sequentially applies a read command to each controller 13 by referring to the internal synchronization signal generated by the internal synchronization generation circuit 16. .
이와같이 마이컴(15)의 명령에 따라 각 콘트롤러(13)는 메모리 IC(10)의 특정번지에 저장된 데이타를 규정된 타이밍을 갖는 수평동기신호 및 수직동기신호에 맞추어 독출하고 이는 D/A 컨버터(11)를 거쳐 아날로그 신호로 재생되어 멀티플렉서(14)에 입력됨으로서, 멀티플렉서(14)에서는 규정된 타이밍을 갖는 동기신호에 따른 영상신호가 계속 출력되어 모니터(17)로 안정된 화면을 볼 수 있게되는 것이다.In this way, according to the command of the microcomputer 15, each controller 13 reads out the data stored at a specific address of the memory IC 10 in accordance with the horizontal synchronization signal and the vertical synchronization signal having a prescribed timing. By being reproduced as an analog signal through the input signal and input to the multiplexer 14, the multiplexer 14 continuously outputs a video signal corresponding to a synchronization signal having a prescribed timing so that the monitor 17 can see a stable screen.
이와 같이 하여 본 고안은 각 채널(CH1-CH8)을 통해 입력되는 비디오 영상신호가 각 메모리IC(10)에 저장된 후 마이컴(15)에 의한 명령으로 내부동기 발생회로(16)의 동기신호에 일치되도록 멀티플렉서(14)로 출력시킴으로써 각 채널(CH1-CH8)의 비디오 영상신호의 동기를 일치시킬 수 있으므로 한 채널에서 다른 채널로 절환되는 순간 모니터 영상이 비동기 노이즈에 의해 일시적으로 일그러지거나 무너지는 현상을 제거할 수 있게 되어 양질의 화면을 제공할 수 있게되는 것이다.In this way, the present invention is a video signal input through each channel (CH 1 -CH 8 ) is stored in each memory IC (10), and then a command by the microcomputer 15, the synchronization signal of the internal synchronization generating circuit 16 By outputting to the multiplexer 14 so that the video signal of each channel (CH 1 to CH 8 ) can be synchronized, the monitor image is temporarily distorted by asynchronous noise when switching from one channel to another. The collapse can be eliminated to provide a good picture.
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Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019910014545U KR950005694Y1 (en) | 1991-09-06 | 1991-09-06 | Device which switch image signal synchronously in a security system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019910014545U KR950005694Y1 (en) | 1991-09-06 | 1991-09-06 | Device which switch image signal synchronously in a security system |
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| Publication Number | Publication Date |
|---|---|
| KR930007293U KR930007293U (en) | 1993-04-24 |
| KR950005694Y1 true KR950005694Y1 (en) | 1995-07-20 |
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| Application Number | Title | Priority Date | Filing Date |
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| KR2019910014545U KR950005694Y1 (en) | 1991-09-06 | 1991-09-06 | Device which switch image signal synchronously in a security system |
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| KR (1) | KR950005694Y1 (en) |
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1991
- 1991-09-06 KR KR2019910014545U patent/KR950005694Y1/en not_active IP Right Cessation
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| KR930007293U (en) | 1993-04-24 |
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