KR940027124A - Lead inspection method of integrated circuit and its device - Google Patents

Lead inspection method of integrated circuit and its device Download PDF

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Publication number
KR940027124A
KR940027124A KR1019930007540A KR930007540A KR940027124A KR 940027124 A KR940027124 A KR 940027124A KR 1019930007540 A KR1019930007540 A KR 1019930007540A KR 930007540 A KR930007540 A KR 930007540A KR 940027124 A KR940027124 A KR 940027124A
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KR
South Korea
Prior art keywords
integrated circuit
image
lead
unit
image information
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KR1019930007540A
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Korean (ko)
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KR0119723B1 (en
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이영
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김주용
현대전자산업 주식회사
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Priority to KR1019930007540A priority Critical patent/KR0119723B1/en
Publication of KR940027124A publication Critical patent/KR940027124A/en
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84—Systems specially adapted for particular applications
    • G01N21/88—Investigating the presence of flaws or contamination
    • G01N21/8851—Scan or image signal processing specially adapted therefor, e.g. for scan signal adjustment, for detecting different kinds of defects, for compensating for structures, markings, edges
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84—Systems specially adapted for particular applications
    • G01N21/88—Investigating the presence of flaws or contamination
    • G01N21/8851—Scan or image signal processing specially adapted therefor, e.g. for scan signal adjustment, for detecting different kinds of defects, for compensating for structures, markings, edges
    • G01N2021/8887—Scan or image signal processing specially adapted therefor, e.g. for scan signal adjustment, for detecting different kinds of defects, for compensating for structures, markings, edges based on image processing techniques
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2853—Electrical testing of internal connections or -isolation, e.g. latch-up or chip-to-lead connections

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  • Engineering & Computer Science (AREA)
  • Computer Vision & Pattern Recognition (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Biochemistry (AREA)
  • General Health & Medical Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Immunology (AREA)
  • Pathology (AREA)
  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)

Abstract

본 발명은 집적회로(IC)의 리드(Lead) 검사방법 및 그 장치에 관한 것으로써, 특히 화상처리장치(5)내의 화상메모리부(53)에 입력된 집적회로(6)의 리드(61)에 대한 2차원 화상의 명암크기를 수직측으로 합산하여 1차원의 화상정보로 변환시키고, 이 1차원의 화상에 대한 크기 및 폭을 검출하여 집적회로의 리드 블랴유무 및 불량상태의 종류를 모니터상에 나타내주므로서, 처리속도가 매우 빨라 집적회로의 생산성이 향상되고, 검사장비를 저가에 구현할 수 있어 제품의 생산원가를 절감시킬 수 있음은 물론 집적회로의 리드 불량유무 및 불량의 종류를 정확히 알아낼 수 있으므로 수선 및 폐기처분해야 할 집적회로의 선별이 가능하여 제품의 생산성 및 신뢰도가 향상되고, 또 주로 발생되는 불량종류를 정확히 파악하여 공정 개선에 적용시킬 수 있어 생산관리를 향상시킬 수 있는 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for checking a lead of an integrated circuit (IC) and an apparatus thereof, and in particular, a lead 61 of an integrated circuit 6 input to an image memory unit 53 in the image processing apparatus 5. The intensity of the two-dimensional image is summed vertically and converted into one-dimensional image information. The size and width of the one-dimensional image are detected to determine whether the integrated circuit has lead lead or not and the kind of the defective state. As the processing speed is very high, the productivity of integrated circuit is improved and the inspection equipment can be implemented at low cost, which can reduce the production cost of the product, and can also pinpoint whether the integrated circuit has a lead defect and the type of the defect. Therefore, it is possible to select integrated circuits to be repaired and disposed of, so that the productivity and reliability of the product can be improved, and it is possible to accurately identify the types of defects that occur mainly and apply them to process improvement. The will to improve.

Description

집적회로의 리드 검사방법 및 그 장치Lead inspection method of integrated circuit and its device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명 리드 검사장치의 시스템 구성도, 제2도의 (가) - (사)는 본 발명에 의한 리드 검사상태의 예를 1차원 및 2차원으로 나타낸 그래프.1 is a system configuration diagram of a lead inspection apparatus of the present invention, and (a) to (g) of FIG. 2 are graphs showing examples of lead inspection states according to the present invention in one and two dimensions.

Claims (3)

CCD 카메라(1,2)와 화상처리장치(5)를 이용하여 집접회로(6)의 리드(61)를 검사하는 화상처리방법에 있어서, 상기 화상처리장치(5)내의 화상메모리부(53)에 입력된 집적회로(6)의 리드(61)에 대한 2차원 화상의 명암크기를 수직측으로 합산하여 1차원의 화상정보로 변환시킨 후, 상기 1차원의 화상에 대한 크기 및 폭을 검출하여 집적회로(6)의 리드(61) 불량유무 및 불량상태의 종류를 모니터(7)상에 나타내는 과정으로 이루어진 것을 특징으로 하는 집적회로의 리드 검사방법.An image processing method for inspecting the lead 61 of the integrated circuit 6 by using the CCD cameras 1 and 2 and the image processing apparatus 5, wherein the image memory unit 53 in the image processing apparatus 5 is used. The intensity of the two-dimensional image of the lead 61 of the integrated circuit 6 inputted to the vertical side is added to the vertical side to be converted into one-dimensional image information, and then the size and width of the one-dimensional image are detected and integrated. A lead inspection method for an integrated circuit, comprising a process of displaying on a monitor (7) whether a lead (61) of a circuit (6) is defective or not. 집적회로(6)의 양측면에 설치되어 리드(61)에 균일한 조명을 실시해 주는 링 조명기구(3,4)와 ; 상기링 조명기구(3,4)의 후방부에 설치되어 집적회로(6)의 양측면에서 리드(61)의 화상을 촬영하여 화상처리장치(5)에 전송시켜 주는 CCD 카메라(1,2)와 ; 상기 CCD 카메라(1,2)에서 출력되는 2차원의 화상정보를 입력받아 1차원의 화상정보로 변환한 후 리드의 상태를 검사하여 그 결과를 모니터(7) 및 통신선로를 통해 외부에 출력시켜 주는 화상처리장치(5)를 상호 연결 구성하여서 된 것을 특징으로 하는 집적회로의 리드 검사장치.Ring luminaires 3 and 4 provided on both sides of the integrated circuit 6 to provide uniform illumination to the lid 61; CCD cameras 1 and 2 installed at the rear portions of the ring luminaires 3 and 4 to capture images of the lids 61 on both sides of the integrated circuit 6 and transmit them to the image processing apparatus 5. ; After receiving the two-dimensional image information output from the CCD camera (1, 2) is converted into the one-dimensional image information and inspect the state of the lead and output the result to the outside through the monitor 7 and the communication line The main assembly is a lead inspection apparatus for an integrated circuit, characterized in that the image processing apparatus (5) is interconnected. 제2항에 있어서, 상기 화상처리장치(5)는 CCD 카메라(1,2)에서 각각 출력되는 화상정보중 어느 일측을 선택하는 멀티플렉서(51)와 ; 상기 멀티플렉서(51)를 통해 출력되는 아날로그의 화상정보를 디지탈 신호로 변환시켜 주는 A/D 변환부(52)와 ; 상기 A/D 변환부(52)에서 출력되는 화상정보를 기억하고 있다가 각부에서 출력되는 제어신호에 의해 선택적으로 출력시켜 주는 화상메모리부(53)와 ; 상기 화상메모리부(53)와 중앙처리부(55)에 소정의 타이밍 신호를 발생시켜 주는 타이밍 제어부(54)와 ; 소정의 프로그램에 의해 각부의 전반적인 제어기능을 수행함과 동시에 화상메모리부(53)에 저장되어 있는 화상데이타를 처리하는 중앙처리부(55)와 ; 상기 화상 메모리부(53)에 저장되어 있는 데이타의 입출력을 제어하는 메모리 제어부(56)와 ; 상기 중앙처리부(55)에서 출력되는 화상정보의 처리결과를 통신라인을 통해 외부와 출력시켜 주는 통신제어부(57)와 ; 상기 화상 메모리부(53)에 저장되어 있는 디지탈의 화상데이타 및 중앙처리부(55)에 의해 처리된 디지탈의 결과를 아날로그 신호로 변환시켜 모니터(7)에 출력시켜 주는 D/A 변환부(58)를 구비한 것임을 특징으로 하는 집적회로의 리드 검사장치.The image processing apparatus (5) according to claim 2, further comprising: a multiplexer (51) for selecting any one side of image information respectively output from CCD cameras (1, 2); An A / D conversion unit 52 for converting analog image information output through the multiplexer 51 into a digital signal; An image memory unit 53 for storing image information output from the A / D conversion unit 52 and selectively outputting the image information by a control signal output from each unit; A timing control section 54 for generating a predetermined timing signal to the image memory section 53 and the central processing section 55; A central processing unit 55 for performing the overall control function of each unit by a predetermined program and processing image data stored in the image memory unit 53; A memory control section 56 for controlling input and output of data stored in the image memory section 53; A communication control unit 57 for outputting the processing result of the image information output from the central processing unit 55 to the outside through a communication line; D / A conversion unit 58 for converting the digital image data stored in the image memory unit 53 and the digital result processed by the central processing unit 55 into an analog signal and outputting the analog signal to the monitor 7. Lead inspection apparatus of an integrated circuit, characterized in that it comprises a. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019930007540A 1993-05-01 1993-05-01 Lead test method and its apparatus of integrated circuit KR0119723B1 (en)

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Application Number Priority Date Filing Date Title
KR1019930007540A KR0119723B1 (en) 1993-05-01 1993-05-01 Lead test method and its apparatus of integrated circuit

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KR940027124A true KR940027124A (en) 1994-12-10
KR0119723B1 KR0119723B1 (en) 1997-10-17

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100261957B1 (en) * 1996-11-18 2000-07-15 오우라 히로시 Horizontal carrying test handler
KR101694899B1 (en) * 2016-07-13 2017-01-10 현대아이티에스전자(주) LED electronic display board controller for detecting error and method for detecting error thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100261957B1 (en) * 1996-11-18 2000-07-15 오우라 히로시 Horizontal carrying test handler
KR101694899B1 (en) * 2016-07-13 2017-01-10 현대아이티에스전자(주) LED electronic display board controller for detecting error and method for detecting error thereof

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Publication number Publication date
KR0119723B1 (en) 1997-10-17

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