JPS62150143A - Detection of pattern defect - Google Patents

Abstract

PURPOSE:To detect a defect of a printing circuit pattern in non-contact and at a high speed by arranging a connection data of a pad to be a circulation list structure to be compared with a connection data prepared based on a normal pattern. CONSTITUTION:An optical image of a pattern to be inspected is converted in signal with a cameral 21 and is supplied to a coupling processor 23c separately by way of a coupling processor 23a, compression processor 29 and a coupling processor 23b and a expansion processor 30 to prepare a connection data referring a data in a memory 27 via a binary-coding unit 22. On the other hand, about design data, a connection data obtained from a pattern to be inspected without defect is read out from a memory 24 and is converted to a circulation list structure with a processor 25 to be stored into a memory 26. Then, after the preparation of a connection for all circuit patterns for an object to be inspected, a defect detection algorism is executed with a processor 25 and the corresponding data is compared with the contents of a memory 28 for determining defects.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of inspecting patterns such as printed circuit patterns, and in particular to a pattern suitable for detecting defects related to electrical continuity in a non-contact manner and at high speed. This invention relates to a defect detection method.

[Conventional technology]

Conventionally, as a pattern inspection method that does not require strict alignment, there is a method disclosed in Japanese Patent Laid-Open No. 179343/1983. This method detects the number of detected binary patterns, their narrower patterns, or their thicker patterns within a specific range, and compares them with the number of patterns found from standard patterns, and if they do not match, it is determined that there is a defect. It is something. This eliminates the need for strict pattern alignment for each detection pixel.

[Problem that the invention seeks to solve]

However, with the above method, it is not possible to precisely point out the location where the defect occurs. Also, within a certain range of counting the number of patterns,
If pattern separation (disconnection) and pattern fusion (short circuit) occur at the same time, the number of patterns remains the same as the standard number of patterns, and there is a problem that this may be overlooked.

Furthermore, it was necessary to provide the number of patterns in the inspection range in advance by manually counting them from design data.

The purpose of the present invention is to solve the problems of the prior art described above,
It is an object of the present invention to provide a method for detecting pattern defects such as disconnections, short circuits, small pattern widths, and small pattern intervals in printed circuit patterns in a non-contact and high-speed manner.

[Means for solving problems]

To detect electrical continuity in circuit patterns without contact,
It is assumed that the pattern exists on a plane.

Then, there are two methods: detecting the optical image of the fi+ pattern and separating and extracting only the conductor portion as a binary pattern; (2) applying connectivity processing to the binary pattern to examine the connection relationship between two pads; and (3) ) The butter to be inspected is defect-free and has a correct connection relationship that has been converted into a circular list structure in advance.
(4) Prepare a connection relationship obtained by performing connectivity processing on the pattern or one modified after the connectivity processing; By comparing the correct t-connection relationship prepared in step 3), it is possible to account for disconnections and short circuits.

[Effect]

In the present invention, as a data structure for outputting connectivity processing, the pad of interest is taken as an address, and the pad number connected to it is taken as the data content, and connection relation data obtained from a pattern to be inspected that does not include defects or Convert the connection data obtained from the pattern to be inspected into a circular list structure (modify the connection relationship data if necessary) and create it as design data in advance. This is a method of checking by extracting data one by one and checking whether each pad exists on a circular list of design data.

Here, the design data is cardinality data obtained by extracting connection relationships from the pattern to be inspected (representing correct connection relationships) in advance, modifying them if necessary, and converting them into a circular list structure. shall be synonymous with each other.

First, we will explain connection data in more detail. The connection data has a structure in which the pad number of interest is used as an address, and the data content is a parent pad number that is connected to the pad number of interest.

The pad number is a number assigned to a pad on a circuit pattern whose conductivity, etc., needs to be tested according to a specific rule. For example, as shown in FIG. 4, the numbers are numbered from top to bottom and from left to right. Among the pads, the parent pad is a specific pad that represents each connected circuit pattern.
pad. The method for determining the parent pad may be determined by predetermining a specific criterion, such as determining the parent pad at the upper leftmost position on one circuit pattern. Table 1 shows connection data using the pattern of FIG. 4 as an example.

In the figure, the parent pads are pad numbers 1 and 4.

Next, the design data will be explained in more detail. The design data has a data structure consisting of addresses or pad numbers and the contents of a circular list. Here, the contents of the circular list are defined as follows. In other words, when cycling numbers representing a pad number, the first appearing pad number that is connected to that pad number is the content of the cyclic list corresponding to the address (pad number). Therefore, each circular list has 1
This shows the connection relationships of all pad numbers on two connected circuit patterns.

Here, the connection relationship means only a simple connection relationship between pads, and does not indicate a geometric positional relationship.

The order of pointing is the youngest or oldest static number. Table 2 shows design data using the pattern of FIG. 4 as an example.

(Leaving space below the essence) Table 1 Table 2 Next, a method for converting connection data into a circular list structure will be described. The connection data is in the data table,
It is assumed that the data is stored in addresses 1 to 1. A circular list can be obtained by rewriting the contents according to the fu-chard procedure shown in FIG.

A method for detecting defects by comparing the connection data explained above with design data will be described.

In order to store intermediate data of processing, 2-bit attribute data is added to each pad number (address) of the design data. The algorithm for this is shown below.

Defect detection algorithm Stage 1. Clear all attribute data to 0.

Stage 2. Compare all connection data with design data using the following procedure and store the results in attribute data. If the left and right pad numbers of the connection data are the same, attribute data 1
゜If not, go through the circular list on the design data and check whether the right pad number (parent pad number) of the connection data is on the design data. If there is, attribute data 2
．． If this is not the case, examine the attribute data in each circular list of the attribute data 3-1 stage 5 design data and determine the defect according to the following criteria.

If there is one or more case t o → There is a defect in the pad () No pad) Case λ If there is one 1 and all others are 2 → If there are two or more normal cases 3.1 → Disconnection If there is one or more case 4.3 → short circuit stage 4. Outputs the defect determination results for each circular list (connected circuit patterns).

〔Example〕

An embodiment of the present invention will be described below with reference to FIG. First, the imaging device 21 converts an optical image of the pattern to be inspected into an electrical signal. The image capturing device 21 may be a two-dimensional image capturing device such as a W camera, or may be an image capturing device using a combination k of a linear sensor and a unidirectional drive mechanism.

The electrical signal is converted into a binary signal (binary pattern) by the binarization device 22. For binarization, a fixed threshold method may be used, or in order to obtain a stable pattern, a floating threshold method or shading correction means may be used. The binary signal is input directly to the connectivity processing device 23α, and the other is input to the connectivity processing device 2 through the reduction processing device 29.
5b and another input to the connectivity processing device 23c through the enlargement processing device 60.

More specifically, the connectivity processing device is a device that embodies the method shown in the application specification entitled "Connectivity Detection Method (T# Application No. 59-104571)" previously filed by the present applicant. Yes, and creates connection data. In order to know the pad number during connectivity processing, design information or
A correspondence relationship between pad positions and pad numbers is created from the pad spacing and number and stored in the pad position data memory 27.

An embodiment of the reduction processing device 29 is shown in FIG.

The device is composed of 31 (mt-1) rubit shift registers and 32rILt shift registers of 77!1 bits. These shift registers are driven by the same sampling clock. is made to match the number of sampling points of the imaging device 21 in the horizontal direction. Also, m,
, m is the sampling time interval.

It is determined by the vertical resolution of the imaging device and the size of the defect to be detected. For example, if the sampling time interval and the vertical resolution each correspond to 10 μm, and the size of the defect is 30 μm square, it is set to ml−m−3°. And m
, x m, the output of the shift register 32 to ■Circuit 3
5 and output to the connectivity/connectivity processing device 23. Although the outputs of all shift registers are taken out in FIG. 3, they may be taken out selectively depending on the type of defect to be detected.

The result of reducing the pattern of FIG. 5 is shown in FIG. 6, and the concave defect can be detected as a disconnection.

The enlargement processing device 30 (FIG. 1) can be realized by replacing the [F] circuit in the reduction processing device 29 with an OR circuit. FIG. 7 shows an enlarged result of butter/ in FIG. 5, and the convex defect can be detected as a short circuit.

As for the design data, connection data obtained in advance from a pattern to be inspected that does not contain defects, or connection data obtained by modifying connection data obtained from a pattern to be inspected that includes defects, is read out from the connection data memory 24 and processed on the processing device 25. Convert it to a circular list structure using the conversion method described above,
After creating the connection data of all the circuit patterns to be inspected,
The processing unit 25 executes the defect detection algorithm described above and stores the attribute data in the attribute data memory? Output to 8,
Perform defect determination.

The results of actual defect detection processing will be shown using the pattern to be inspected shown in FIG. 5 as an example. Table 6 shows the contents of the connection data stored in the connection data memory 24 after the binarization process, enlargement or subtraction process, and connectivity process. The fact that the parent pad is O indicates that no pad corresponding to that address number was found.

On the other hand, Table 4 shows the design data obtained from the normal pattern shown in FIG. 8, and the attribute data and determination results given by the above-described method for the original pattern, reduced pattern, and enlarged pattern, respectively. However, processing is performed to comprehensively judge each determination result. That is, as shown in Table 5, from the three judgment results, complete disconnection, complete short circuit, minute 1liIfs, minute wisdom, small pattern width,
It is possible to completely distinguish and detect small pattern intervals. According to this embodiment, it is possible to distinguish between m types of defects and detect them.

Table 6 (margins below essentials) Table 4 Table 5 Next, the memory capacity and processing time required for the embodiment described above will be considered.

Assuming that there are 256×256 pads on one substrate, first calculate the memory capacity. In this case, the pad number can be expressed in 16 bits (2 bytes). Assuming all pads are detected in the connectivity process, the generated connection data is 16 bits x 2562-j,04B,576
bit-13t072 kbyte Also, the design data is 16 bit x 256” -1,048,576b
it-131,072kbyte Attribute data, including spare data, is expressed in 4 bits.
bit x 2562-262,144 bit=
It will be 52.768 kbytes. The total memory capacity for each example is calculated as 622.592 kbytes. These can be done using 64kbit RAM.
Although 76 RAMs are required, this is a sufficiently achievable capacity and does not pose any problem considering future increases in RAM capacity. For example, when detecting a 150m square board with a resolution of 5μm, the amount of information in the original image is 900Mbit (-112
, 5 Mbytes), these can be said to be very compact.

Furthermore, regarding processing time, there is no need to take this into consideration as it is only necessary to convert the connection data into a circular list structure once before inspection, and therefore it is evaluated based on the number of times the design data is referenced. If the average number of pads on one connected pattern is R, then the average number of references required to find a parent pad when generating attribute data is 25, assuming that all patterns are defect-free.
In the case of 6 x 256 pads, it becomes ru + 1 - Therefore, if we assume rule 4, it takes 16 to generate the attribute data.
There are 5,478.4 references to design data. Further, in the defect determination process, all the design data needs to be referenced once, so 2562-65,536 references are required. Processing from the imaging device 21 to connection data generation by the connectivity processing device 25 can be performed in real time. Therefore, if the sampling frequency of the image signal is 5 MI (Z), the processing device is a microcomputer, and a device with an assumption that it takes 100 μs to refer to the design data once is used to inspect a board with a 150 fill angle at a resolution of 5 μm, The overall inspection processing time for the example is 2493 seconds.

〔Effect of the invention〕

As explained above, according to the present invention, patterns are detected in a non-contact manner using optical means, and connection relationships between pads are determined by image processing, so that it is not affected by slight variations in the target pattern. , and can perform defect inspection at high speed with high reliability without damaging the pattern.

In particular, since a list structure is used for design data representing connection relationships, for example, in the case of a 256 x 256 pad, it is 256" x 2
2.56 x 10'bit to 1.05 x in 56"
Data compression to 10'bit can be achieved, and processing time can be significantly reduced.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a flowchart regarding circular list generation, FIG. 3 is a diagram showing an embodiment of a reduction processing device, and FIGS. 4 to 8 are diagrams showing various patterns. FIG. 21... Imaging device, 22... Binarization device, 25...
- Connectivity processing device, 24... Connection data memory, 25
...processing device, 26...design data memory,
27... Pad position data memory, 2B... Attribute data memory, 29... Reduction processing device, 30... Enlargement processing device, 51.52... Shift register, 33... Circuit. A 2nd eye 4 Nagimo 5 countries Me 6 Figure 8 Figure Ka 7

Claims (1)

[Claims] After converting an optical image of a pattern consisting of one, a plurality of pads, or one pad into an electrical signal and binarizing it, the number assigned to the pad is used as the address of the pad, and the pad is connected. The connection data in which the numbers assigned to the related patterns are the data of the pads is structured as a circular list, and the defects in the patterns are detected by comparing it with the connection data created based on the binarized regular pattern. A pattern defect detection method characterized by detecting a pattern defect. 2. The pattern defect detection method according to claim 1, characterized in that, after converting the optical image into an electrical signal and binarizing it, the binarized pattern is subjected to reduction or enlargement processing. A method for detecting pattern defects.