JP3283866B2 - Circuit pattern defect inspection method and apparatus - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic circuit such as a printed circuit board circuit pattern, a circuit pattern on a ceramic, a hybrid circuit pattern, a facsimile electrode circuit pattern, a thin film circuit pattern, a liquid crystal display element circuit pattern, and an LSI circuit pattern. The present invention relates to a circuit pattern defect inspection method and an apparatus for automatically inspecting (wiring) pattern defects by image processing.

[0002]

2. Description of the Related Art There have been many cases of appearance inspection apparatuses for circuit patterns. For example, Japanese Patent Publication No. 59-24
No. 361 and the like. In this case, two sets of circuit patterns are compared with each other, and a portion that does not match each other is detected as a defect. Defect inspection requires high speed,
The circuit pattern comparison processing circuit is configured to perform processing in synchronization with the speed of the circuit pattern detector. Specifically, it is constituted by a logic circuit called "pipeline processing" using a large number of shift registers.

[0003]

In the above prior art, the pipeline processing can perform image processing at high speed, but the content of the image processing is simple, and there is a problem that complicated defect determination cannot be performed at high speed. Was.

SUMMARY OF THE INVENTION An object of the present invention is to provide a circuit pattern defect inspection method and an apparatus therefor which are capable of determining, by image processing, the harmfulness of conduction of a complex defect which can be judged at high speed by the human eye. To provide.

[0005]

That is, according to the present invention, in order to achieve the above-mentioned object, in a defect inspection method, an image pickup device operated by a predetermined image pickup signal and a sample are relatively moved by an image pickup device. An image of a sample having a pattern formed on the surface is obtained to obtain an image of the sample, and a partial image including a defect candidate is extracted from the image at a first processing speed in synchronization with an imaging signal while imaging the sample, and stored. And processing the stored partial image at a second processing speed lower than the first processing speed to extract a defect candidate, and the size or shape of the extracted defect candidate, or the extracted defect candidate. The harmfulness of the extracted defect candidate is determined based on the positional relationship between the defect candidate and the pattern.

According to the present invention, in order to achieve the above object, in a defect inspection method, an image of a sample is obtained by imaging a sample in synchronization with a predetermined imaging signal, and this image is synchronized with the imaging signal. The partial images including the defect candidates are sequentially extracted by processing at the first processing speed, the partial images including the extracted defect candidates are sequentially stored in the storage unit, and the partial images including the stored defect candidates are stored in the first image. Defects are classified by sequentially processing at a second processing speed lower than the processing speed of.

According to the present invention, in order to achieve the above object, in a defect inspection method, an image of a sample is obtained by imaging a sample in synchronization with a signal of a predetermined clock frequency, and the image is synchronized with the signal. To sequentially extract partial images including defect candidates, sequentially store the extracted partial images including defect candidates in storage means, and store the stored partial images including defect candidates at a predetermined clock frequency of the signal. Defect candidates extracted by sequentially processing in synchronization with a signal having a lower clock frequency are classified.

According to the present invention, in order to achieve the above object, a defect inspection apparatus includes a table means on which a sample having a pattern formed on a surface is mounted and which can be moved in a plane, and a predetermined imaging signal. An imaging unit that operates to capture an image of a sample placed on a table unit to obtain an image of the sample; and a predetermined imaging of a partial image including a defect candidate from the obtained image of the sample while imaging the sample with the imaging unit. A partial image extracting unit that extracts in synchronization with a signal, a storage unit that stores a partial image including a defect candidate extracted by the partial image extracting unit in synchronization with a predetermined imaging signal, and a predetermined imaging unit that captures the stored partial image. A defect candidate extracting means for synchronizing with a signal having a lower frequency than the signal to extract a defect candidate; and a size or shape of the defect candidate extracted by the defect candidate extracting means, or the extracted defect candidate and pattern. Position was constructed and a determining means for determining hazards of the extracted defect candidate based on the relationship.

According to the present invention, in order to achieve the above object, an image pickup means for picking up an image of a sample in synchronization with a predetermined image pickup signal, and a sample obtained by picking up an image of the sample with the image pickup means. A partial image extraction unit for sequentially extracting partial images including defect candidates by processing the image in synchronization with the imaging signal, and synchronizing the partial image including the defect candidates extracted by the partial image extraction unit with the imaging signal. Storage means for sequentially storing, and defect classification means for sequentially processing a partial image including a defect candidate stored in the storage means in synchronization with a signal of a lower frequency than a predetermined imaging signal to classify defects did.

According to the present invention, in order to achieve the above object, an image pickup means for picking up an image of a sample by synchronizing with a signal of a predetermined clock frequency to obtain an image of the sample is provided. A partial image extracting means for sequentially extracting partial images including defect candidates by processing the obtained image in synchronization with a signal of a predetermined clock frequency; and sequentially outputting partial images including the defect candidates extracted by the partial image extracting means. Storage means for storing, and classification means for classifying defect candidates extracted by sequentially processing a partial image including a defect candidate stored in the storage means in synchronization with a signal having a clock frequency lower than a predetermined clock frequency of the signal. And was configured.

With the above configuration, it is possible to inspect a defect which is harmful in terms of electrical conduction and a non-harmful defect which is not so particularly at a high speed with respect to a high-density and large-sized substrate circuit pattern.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be specifically described below based on embodiments shown in the drawings.

First, the principle of the present invention will be described with reference to FIGS. In FIG. 1, an inspection system I surrounded by a broken line is a system in which image signals output from the imaging devices (pattern detection devices) 1 and 1 'are subjected to image processing by a defect determination device 3 to detect defect candidates. In FIG. 1, the imaging devices (pattern detection devices) 1 and 1 ′ are, for example, a CCD linear image sensor or a scanning photoelectric conversion device such as a system that scans a laser beam spot and detects reflected light. Normal circuit patterns A and B have the same XY stage 15 as shown in FIG.
The corresponding part is put on the top and detected by the imaging devices 1 and 1 ′. In FIG. 1, the XY stage 15 and the lighting device are omitted. As the inspection system I, various forms other than those shown in FIG. 1 can be considered. That is, as shown in FIG. 2, the inspection system I includes one imaging device (pattern detection device) 1 and a defect determination device 3 (for example, shown in the IEEJ National Convention No. 1347 in 1973). .

Inspection system I surrounded by a broken line in FIG.
The defect determination device 3 performs image processing on the image signal 8 output from the imaging device (pattern detection device) 1 and the reference image signal 9 ′ output from the reference pattern generation device 7 to detect a defect candidate. As the reference pattern generator 7, for example,
Although not described in detail in the drawings, there is a type in which a reference pattern is compressed and stored in a pattern storage device in advance and a reference pattern is generated from the stored data (for example, see Japanese Unexamined Patent Application Publication No.
No. 2-247498. ). In addition, there is one that generates a reference pattern based on design data used to draw a circuit pattern (for example, it is described in the Transactions of the Society of Instrument and Control Engineers vol. 20, No. 12.63-70). ).

The present invention does not depend on the configuration of the inspection system I, as shown in FIGS.
In addition, a feature is that a complicated inspection can be performed by attaching a partial image inspection system II and combining them. In the partial image inspection system II, the partial image processing apparatus 13 itself has an image memory, and appropriately takes out an image signal (for example, an image of 256 × 256 pixels) written in the image memory, performs image processing, and performs processing again. It is a device that can execute complicated image processing by repeating writing of the image signal into the image memory. The algorithm of each image processing can be specified by software. However, depending on the device, this part is assembled by a logic circuit (partially by a pipeline circuit) to achieve high speed. Also in this case, the image signal is once written in the image memory and then processed, so that high-speed image processing cannot be performed as in the defect determination device 3 of the inspection system I. An example of the partial image processing device 13 is document image information (I), June 25-31, 1984.

The inspection system I shown in FIGS.
, Detection and image processing time per pixel is 0.1μ
s (clock frequency f ₀ = 10 MHz), but the partial image processing device 13 may be, for example, 256 × 25
To process 6 = 6.6 × 10 ⁴ pieces of the image pixel at 0.1 (s) degree, the processing time per pixel is 0.1 /
(6.6 × 104) = approximately 1.5 μs. For this reason, a partial image signal around the defect is extracted from the image signal output by the inspection system I by the interface 11 and stored in the partial image memory 12, and the stored partial image signal is input to the partial image processing device 13 to generate a complex image. Do the processing,
The harmfulness of the defect can be determined.

FIG. 4 shows a partial image signal Ip from the image signal 8 of the circuit pattern A or the image signal 9 of the reference circuit pattern B output by the imaging device (pattern detection device) 1 or 1 'of FIG. 1 shows an outline in which the partial image signal Dp of the defect pattern image signal 10 output as a processing result is stored in the partial image memory 12 as one set. Assuming that the number of detected pixels of the imaging devices (pattern detection devices) 1 and 1 ′ in FIG. 1 is, for example, 1024, the number of horizontal pixels of the image signal 8 of the circuit pattern A, the image signal 9 of the reference circuit pattern B, and the defect pattern image signal 10 n becomes 1024. From among these, rectangular partial image signals Ip and Dp of N × N pixels (for example, N = 256) including a defect are stored in the partial image memory 12. As the partial image signal Ip, the partial image signal Ip of the circuit pattern image signal 8 and the partial image signal Ip of the reference circuit pattern image signal 9 are stored in the partial image memory 12, or the circuit pattern image signal 9, the reference circuit pattern image The partial image signal Ip including the defect candidate among the signals 9 can be stored in the partial image memory 12.

FIG. 5 shows a partial image signal Ip from the circuit pattern image signal 8 output by the imaging device (pattern detection device) 1 of FIG. 2, and a partial image from the reference circuit pattern image 9 'output by the reference pattern generator 7. The signal Rp and the partial image signal Dp of the defect pattern image signal 10 output as a processing result by the defect determination device 3 as one set
2 shows the outline stored in FIG. The number of pixels detected by the imaging device (pattern detection device) 1 in FIG.
When the reference circuit pattern is generated from the reference pattern generator 7 with the same number of pixels, the horizontal pixel number n of the circuit pattern image signal 8, the reference circuit pattern image signal 9 ', and the defect pattern image signal 10 becomes 1024. From these, rectangular partial image signals Ip, Rp, and Dp of N × N pixels (for example, N = 256) including the coordinates of the defect (candidate) point are taken out and shown in FIG.
In the partial image memory 12. Even when there are a plurality of defects, the plurality of partial image signals Ip, Rp, and Dp are stored in the partial image memory 12.

FIG. 6 shows an improved method of storing the partial image signals in the partial image memory 12 in FIG. 5. The partial images Ip ′, R
p ′ and Dp ′ are stored in the partial image memory 12.

FIG. 7 shows an improved method of storing the partial image signal in FIG. 6 in the partial image memory 12. Even when there are a plurality of defect representative points 4 close to each other, a plurality of overlapping portions (overlapping portions) ) 15 for the partial image signal image I
p ″, Rp ″ and Dp ″ are stored in the partial image memory 12.

Next, the harmful judgment of a defect by the partial image processing device 13 will be described. FIG. 8 and FIG. 9 show examples of harmful defects and non-harmful defects in conduction defects of the circuit pattern. Although Figure 8 b is a case where there is a defect of lacking in the linear circuit pattern, the longitudinal length v ₁ becomes larger than harmful defect inspection reference value with respect to the circuit pattern of the missing portion, in the case of less than Is not a harmful defect. FIG. 8B shows a case where there is a pinhole in the linear circuit pattern.
The length v ₂ in the longitudinal direction with respect to the pinhole circuit pattern
Is larger than the inspection standard value, it is a harmful defect. Although Figure 8 c shows a case where there is a projection on the linear circuit pattern, if be harmful least defective value n 1 of the pattern interval from the normal circuit pattern around the linear circuit pattern to protrusion is smaller than the inspection reference value, or Is not a harmful defect. 8 d in the case where the isolated pattern there, if minimum values n ₂ of the pattern interval from the isolated pattern to normal circuit pattern around is smaller than the inspection reference value becomes harmful defects, in the case of more not harmful defects. FIG. 9E shows a case where there is a chip on a large circuit pattern. If the total area of the chip ΔSi is larger than the inspection reference value, the chip becomes a harmful defect. FIG. 9 shows a case where a pinhole is present in a large circuit pattern.
If i is greater than the inspection reference value, it is a harmful defect, and if i is less than that, it is not a harmful defect. Figure 9 DOO is a case where there is a protrusion on the large circuit pattern, but if the pattern spacing n ₁ to projections from the normal circuit pattern around is smaller than the inspection reference value becomes harmful defects, not in the case of more harmful defects .

In the case of the inspection system I, the harmful defect and the non-harmful defect in FIGS. 8 and 9 cannot be distinguished. For this reason, the operator has to work to distinguish harmful defects from non-harmful defects by looking at all the patterns pointed out by the inspection device.

[0023] In the present invention, for the case of FIG. 8 b are distinguished harmful defects and non-harmful defect by measuring v ₁ to t ₁ addition in partial image processing apparatus 13. FIG.
For the case of B are distinguished harmful defects and non-harmful defect by measuring v ₂ to t ₂ addition. For the case of FIG. 8 c also measures the m ₁ and n ₁ are distinguished harmful defects and non-harmful defect. In the case of FIG. 8, p and n ₂ are measured to distinguish harmful defects from non-harmful defects. In the case of FIG. 9E, harmful defects and non-harmful defects are distinguished by measuring ΔSi. In the case of FIG. 9, harmful defects and non-harmful defects are distinguished by measuring Δli. In the case of FIG.
₂ and n ₃ is measured distinguishes harmful defects and non-harmful defect.

As described above, according to the present invention, as shown in FIGS. 1 and 2, by combining the inspection system I and the partial image inspection system II, the inspection is executed at the same high speed as the inspection system I, and the partial image processing is performed. The harmful defect shown in FIGS. 8 and 9 can be distinguished from the non-harmful defect by combining the advantages of the detailed image processing by the device 13. That is,
1 and 2, a pattern inspection is performed by the inspection system I to determine a defect candidate. A defect representative point signal 4 is output from the defect determination device 3, and this defect representative point signal 4 indicates that all the defect candidates including the harmful defect and the non-harmful defect shown in FIGS. 8 and 9 have been detected. Output signal. In the system of the present invention, the defect representative point signal 4 is used as follows. That is, by using the defect representative point signal 4 as a control signal for storing the partial image signals Ip, Rp, and Dp, the partial image around the defect representative point 4 shown in FIGS. To memorize. Then, the partial image is processed by the partial image processing device 13 to discriminate the harmful defect and the non-harmful defect in conduction in FIGS. 8 and 9. According to this system, the inspection system I performs the inspection of the entire inspection target circuit pattern at high speed. For example, if the size of the circuit pattern to be inspected is 300
X 600 mm. Assuming that the size of the detection pixel is 0.01 mm, the number of processing pixels at this time is 300 × 600 /
(0.01 × 0.01) = 1.8 × 10 ⁹ and 1
Assuming that the detection and processing time per pixel is 0.1 μs, the inspection system I is 1.8 × 10 ⁹ × 10 ⁷ = 180 (s)
Inspect the entire surface. On the other hand, the partial image processing device 13
If there are 10 defect candidates on one substrate, the average is 180
The partial image signal is processed by (s) / 10 = 18 (s) to determine a defect that is harmful to conduction and a non-harmful defect. As described above, this system makes it possible to take advantage of both the high-speed characteristics of the inspection system I (pipeline image processing device) and the detailed image processing capability of the partial image processing device 13. The criterion for determining the defect can be made to match the criterion based on the visual inspection work.

Next, embodiments of the present invention will be described in more detail. That is, since the known system is used for the inspection system I and the partial image processing apparatus 13, the interface 11 of both has a meaning as a hardware circuit. The contents of the interface 11 will be described below. 1 and 2, a circuit pattern image signal 8 input from an imaging device (pattern detection device) 1 to an interface 11 is obtained by converting a time-series scanning signal obtained as shown in FIG.
This is a binary picture element image signal as shown in FIG. 10B obtained by binarization by a binarizing circuit (a binarizing circuit is omitted in FIGS. 1 and 2). Interface 11
The reference circuit pattern image signals 9 and 9 ′ input to the image forming apparatus are binarized binary picture elementary image signals input from the imaging device (pattern detection device) 1 ′ in FIG. This is a binary pixelized time-series signal serving as a reference input from the reference pattern generator 7. The defect pattern image signal 10 from the defect determination device 3 input to the interface 11 is a time-series signal obtained by performing signal processing on the circuit pattern image signal 8 and the reference circuit pattern image signals 9 and 9 ′.

FIG. 11 is a circuit example of the interface 11. The number of horizontal pixels as shown in FIG.
4 (circuit pattern image signal 8, reference circuit pattern image signal 9 (9 '), defect pattern image signal 10) is input to the interface 11, and is used as the defect representative point signal 4 to obtain N × N pixels (for example, N = N). 256) partial image signal Ip
(Ip ′, Ip ″), Rp (Rp ′, Rp ″), Dp
(Dp ', Dp ") is stored in the partial image memory 12, and the stored partial image signals Ip (Ip', Ip"), Rp (R
p ′, Rp ″) and Dp (Dp ′, Dp ″) are input to the partial image processing device 13 (however, this operation is the same for the partial image signal Ip, the partial image signal Rp, and the partial image signal Dp). For this reason, FIG. 11 shows an example of a circuit that takes out any one of the partial images.) The defect representative point signal 4 from the defect determination device 3 (FIG. 2) generates a pulse at the time point t0 when a defect is detected. For this reason, the circuit pattern image signals 8, 9 (9 '), and 10 are obtained so that the images included in the N × N images before t0 can be taken out.
Is delayed by a delay 61 by a time corresponding to N / 2 lines. On the other hand, the defect representative point signal 4 is input to the gate generator 62, and based on the defect representative point signal 4, a gate signal 63 valid for a period corresponding to N pixels is repeatedly generated N lines. By generating the write address 65 from the write address generation 64 during the valid period of the gate, an image of N × N pixels centering on the coordinates of the defect representative point is stored in the partial image memory 1.
2 can be stored. The above processing is performed at high speed (clock frequency f0) in synchronization with the scanning speed of the imaging device (pattern detection device) 1. The partial image memory 12 prepares a plurality of partial image signals Ip ″, Rp ″,
Dp "can be stored.

Next, the partial image signals Ip, Rp, and Dp stored in the partial image memory 12 are input to the partial image processing device 13. Since the partial image processing device 13 is usually made for inputting a TV image, an N × N image is input at a speed of about 1/60 (s). The horizontal synchronizing signal 69 from the partial image processing device 13 is input to the read address generator 67, and the read address 66 is output from the read address generator 67. In the read address generation 67, the horizontal synchronization signal 69 is used as a start signal for forcibly generating the read address 66. The partial image signals Ip, Rp, and Dp are input to the partial image processing device 13 in synchronization with the read address 66.

The write address table 68 has a plurality of defect representative points in the vicinity, and the partial image signals Ip, Rp, D
This is provided to support the case where p overlaps. A plurality of overlapping partial image signals Ip, Rp, Dp
Cannot be written to the partial image memory 12 at the same time.
It is stored in the partial image memory 12 in a format shared by p, Rp, and Dp. At the same time as storing in the partial image memory 12, a write address 65 is stored for each of the plurality of overlapping partial image signals Ip, Rp, Dp in the write address table 68. When reading out the partial image signals Ip, Rp, Dp from the partial image memory 12, the write address table 68 is referred to.

As described above, the defect representative point can be detected at high speed by the inspection system I, and a partial image signal around the detected defect representative point can be input to the partial image processing device 13.

Next, the partial image signal around the defect representative point is subjected to image processing by the partial image processing device 13 to determine the harmfulness of the defect. In FIG. 1, the partial image signal I shown in FIG.
An example will be described in which the harmfulness of defects in conduction is determined from p and Dp.
First, it is determined whether the defect is in the linear circuit pattern (or in the linear circuit pattern) or in a large circuit pattern. Next, in order to reduce the time for determining the harmfulness of the defect, the partial image signal Ip and the partial image signal D
A window is set for p (or only for the partial image signal Ip), and only a part of the partial image signal is processed. Furthermore, the types of defects on continuity are missing, pinholes,
Since there is a defect in the projection or the isolated pattern, it is determined whether the defect is a pinhole or an isolated pattern. After the above-mentioned execution, as shown in FIGS. 8 and 9, the harmfulness of the defect in conduction is determined for each defect.

FIG. 12 shows an example of determining whether a defect exists in a linear circuit pattern (or in a linear circuit pattern) or a large circuit pattern. The partial image signal Ip is divided by the division processing means 16 into an image signal vp of a linear circuit pattern and an image signal Vp of a large circuit pattern.
The image signal vp of the linear circuit pattern, the image signal Vp of the large circuit pattern, and the enlarged image signal Lp of the partial image signal Dp are subjected to inter-image arithmetic processing by the inter-image arithmetic processing means 18 having AND circuits 19a and 19b. Thus, an image signal 20 having a chipped defect and an image signal 21 having no chipped defect are obtained. FIG. 13A shows an example of setting a window when there is a defect in the linear circuit pattern (or in the linear circuit pattern). Partial image signals Ip, Ip ', I
A window of the same size is set at the same position of p "and the partial image signals Dp, Dp ', Dp". The size and position of the window are set so as to include an area within a certain distance (larger value between the maximum value of the pattern width and the minimum value of the pattern interval, which are inspection reference values), around the defect. That is, coordinates (xmin, ymin) and (xma) on the diagonal line of the rectangle including the defect from the partial images Dp, Dp ', and Dp ".
x, ymax), and the starting point of the window xs = xmin−
Δw ₁ , ys = ymin−Δw ₁ , end point xe = xmax + Δw
And calculates the _{1, ye = ymax + △ w} 1. △ w ₁ is a value indicating the predetermined distance required to determine the hazard of defects, a larger value of the minimum value of the maximum value and the pattern interval of the pattern width is the inspection standard value.

FIG. 13B shows an example of setting a window when there is a defect in a large circuit pattern (or in a large circuit pattern). The partial image signal Ip,
Windows of the same size are set at the same positions of Ip ′, Ip ″ and the partial image signals Dp, Dp ′, Dp ″.
The size and position of the window are set so as to include an area within a certain distance Δw ₂ (the minimum value of the pattern interval, which is the inspection reference value), from the large circuit pattern. That rectangle diagonal coordinates including large patterns from the partial image 1 (xmin, ymin), ( xmax, ymax) determine the window of the start point _{xs = xmin- △ w 2, ys} = ym
in- △ w ₂ , end point xe = xmax + △ w ₂ , ye = ymax +
△ and calculates the _{w 2.} Δw ₂ is a value required to determine the harmfulness of a defect, and is the minimum value of the pattern interval that is the inspection reference value.

FIG. 14 shows an example of determining that a defect is a pinhole. The number of holes in the in-window image 28 of the partial image signals Ip, Ip ′, Ip ″ shown in FIG. 13 is measured (pinhole number measurement 29), and the number of holes> 0 (≠ 0) as indicated by 29 ′. If there is a pinhole defect,
If the number of holes = 0 as indicated by 30, it is a defect other than a pinhole.

FIG. 15 shows an example of determining that a defect is an isolated pattern. The white and black of the partial image signals Ip, Ip ′, Ip ″ shown in FIG. 13 are inverted, and the number of holes in the in-window image 31 of the partial image signals Ip, Ip ′, Ip ″ is measured as indicated by 32. . If the number of holes is greater than 0 (≠ 0) as indicated by 33, there is an isolated pattern defect, and 34
If the number of holes = 0 as shown in FIG.

2 shows an example of determining the harmfulness of the defect from the partial image signals Ip ", Rp", Dp "shown in FIG. 7. First, is the defect present in the linear circuit pattern (or?). (A linear circuit pattern) or a large circuit pattern.To shorten the time required to determine the harmfulness of the defect on conduction, the partial image signal Ip "and the partial image signal Rp" To the partial image signal Dp "(or to the partial image signal Ip" and the partial image signal Rp ")
A window is set, and only one part of the partial image signal is processed. In addition, the types of defects on continuity are lacking,
Since there is a defect in the pinhole, the protrusion, or the isolated pattern, it is determined whether the defect is a pinhole or an isolated pattern. After the above-described execution, the harmfulness of the defect is determined for each defect as shown in FIGS. FIG. 16 shows an example of determining whether a defect exists in a linear circuit pattern (or in a linear circuit pattern) or in a large circuit pattern. The partial image signals Rp, Rp ′,
Rp "is enlarged by the enlargement processing means 33 to obtain an enlarged image signal 34, and the enlarged image signal 34 is divided by the division processing means 35 into an image signal 36 of a linear circuit pattern and an image signal 37 of a large circuit pattern. The image signal 36 of the linear circuit pattern and the image signal 37 of the large circuit pattern
And the partial image signals Dp, Dp ′, Dp ″
The inter-image operation processing unit 18 having the circuits 39a and 39b performs inter-image operation processing to obtain a defective image signal 40 and an image signal 41 having no defect. FIG. 17A shows an example of setting a window when there is a defect in the linear circuit pattern (or in the linear circuit pattern). A window having the same size is set at the same position of the partial image signal Ip, the partial image signal Rp, and the partial image signal Dp. The method of calculating the size and position of the window is the same as in the case of FIG. FIG. 17B shows an example of setting a window when there is a defect in a large circuit pattern (or in a large circuit pattern). A window having the same size is set at the same position of the partial image signal Ip, the partial image signal Rp, and the partial image signal Dp. The size and position of the window are set so as to include an area within a certain distance (the minimum value of the circuit pattern interval, which is an inspection reference value), from the large circuit pattern. In other words, the coordinates (Xmin, Xmin,
13 (b), except that ymin) and (xmax, ymax) are obtained. An example of determining that the defect is a pinhole is the same as in FIG. An example of determining that a defect is an isolated pattern is the same as in FIG.

FIG. 18 shows an example of an algorithm for judging the conductive harmfulness of a defect when the linear circuit pattern shown in FIG. Window 48 (partial image signal I
p) is the image signal in the window of the partial image signal Ip including the missing defect. The window 49 (partial image signal Rp) is a partial image signal Rp of the reference pattern image.
Is the image signal in the window. First window 48
The boundary coordinates 52 (xi, yi) of the (partial image signal Ip) are extracted by the boundary coordinate extraction means 50. It is well known that an algorithm for finding the coordinates of the boundary scans the window, first finds a point that hits the pattern, and then uses a 3 × 3 mask pattern.

Next, window 49 (partial image signal Rp)
The angle θ extraction means 51 calculates the “angle θ perpendicular to the direction of the boundary surface” 53 at the coordinates of each boundary. Angle θ
Can be obtained from the 3 × 3 mask pattern 54. There are 16 directions (360 ° is equally divided by 22.5 °) as indicated by 55. The reason for obtaining the “angle θ perpendicular to the boundary surface direction” from the window 49 (partial image signal Rp) is that the window 48 (partial image signal Ip) has defects and irregularities.

The coordinates of the boundary (x
From (i, yi), the coordinates (xj, yj) of a point separated by the minimum value of the circuit pattern width t1, which is the inspection reference value, in the direction of the angle θ as shown by 56 are determined, and the color of the pixel at that coordinate is examined. If there is at least one white pixel, it is a conductive harmful defect, and if it is all black pixels, it is a conductive non-hazardous defect.

Similarly, from the boundary coordinates (xi, yi), 5
As shown by 7, the color of the pixel at the coordinates (xk, yk) of the point separated by the minimum pattern width Cw in the angle θ direction is obtained, and the continuous length of the white pixel is obtained. Continuous length v1 of white pixels
Is larger than the inspection reference value, it is a harmful defect on conduction, and if less than the inspection reference value, it is a non-hazardous defect on conduction.

FIG. 19 shows an example of an algorithm for discriminating the harmfulness of a defect when the pinhole is present in the linear circuit pattern shown in FIG. The window 61 (partial image signal Ip) is an image in the window of the partial image signal Ip including the pinhole defect. Window 61
Since the linear circuit pattern is inclined in the (partial image signal Ip), the linear circuit pattern is rotated by the circuit pattern gradient measurement / rotation means 62 so that the linear circuit pattern is easily measured. obtain. The rotation angle can be obtained by obtaining the angle θ of the inertia main axis by the circuit pattern inclination measurement / rotation means 62. The rotation may use the affine transformation, and the rotation pattern 63 can be obtained. Black and white reversal for rotation pattern 63 (NO
T) A black and white reversal (NOT) is performed by the means 64 to obtain 65 image signals, and a pinhole extraction processing is performed by the pinhole extraction means 68 to obtain a measurement pattern 69 in which only pinhole defects are taken out. Here, x ₁ (the minimum x coordinate where the pattern exists), y ₁ (the minimum y coordinate where the pattern exists),
x ₂ (the maximum x coordinate where the pattern exists) and y ₂ (the maximum y coordinate where the pattern exists) are obtained. Longitudinal length _{v 2} relative to the pattern of the pinhole is _x 2 -x _1.
If v ₂ is larger than the inspection reference value, harmful defects on conduction, v
_{If 2} is less than the inspection reference value, it is a non-harmful defect in conduction.

[0041] Then the sum t ₂ of the shortest distance from the pinhole to the boundary of the linear pattern when the pattern width and l l-
Since (y ₂ −y ₁ ), the pinhole of the rotation pattern 63 is filled by the hole filling means 66 to obtain the measurement pattern 67. The pattern width 1 is measured for the measurement pattern 67. . To fill in the gaps, the OR of the rotation pattern 63 and the measurement pattern 69 may be obtained, and the measurement pattern 67 can be obtained. In the measurement pattern 67, (x ₁ ,
_{y 1) - (x 2,} y 2) can be measured width l of the pattern perpendicular to the longitudinal direction of the linear pattern line connecting. If t ₂ is less than the inspection standard value conducting injurious defects, in the case of more inspection reference value is a non-toxic defects on conduction.

FIG. 20 shows an example of an algorithm for judging the conduction harmfulness of a defect when the linear circuit pattern shown in FIG. Window 70 (partial image signal I
p) is an image in the window of the partial image signal Ip having a projection defect. The window 71 (partial image signal R
p) is an in-window image of the partial image signal Rp of the reference circuit pattern image. First, a surrounding pattern 74 is extracted from the window 70 (partial image signal Ip) by the surrounding pattern means 72. Next, the boundary coordinate extracting means 76 extracts the boundary coordinates (xi, yi) 78 of the surrounding pattern 74. The algorithm for obtaining the coordinates of the boundary is the same as that for the case of lack. On the other hand, the surrounding pattern 75 is extracted from the window 71 (partial image signal Rp) by the surrounding pattern means 73, and the angle θ extracting means 77 determines the “angle θ perpendicular to the direction of the boundary surface” at the coordinates of each boundary from the surrounding pattern 75.
Ask for 9. The algorithm for obtaining the angle θ is the same as that in the case of lack. The 3 × 3 mask pattern is shown at 80.

The coordinates (xj, y) of the point separated from the coordinates (xi, yi) of the boundary obtained at 78 by the minimum value n1 of the pattern interval, which is the inspection reference value, in the angle θ direction.
j) is obtained at 81, and the color of the pixel at that coordinate is examined. If there is at least one black pixel, it is a harmful defect in conduction, and if all the pixels are white, it is a non-harmful defect in conduction.

Similarly, from the coordinates (xi, yi) of the boundary, 82
As shown by, the color of the pixel at the coordinates (xk, yk) of the point separated by the minimum pattern interval Ci in the angle θ direction is obtained, and the continuous length of the black pixel is obtained. Continuous length m1 of black pixels
Is larger than the inspection reference value, it is a harmful defect on conduction, and if less than the inspection reference value, it is a non-hazardous defect on conduction.

FIG. 21 shows an example of an algorithm for determining the harmfulness of the defect when the isolated pattern defect shown in FIG. 8D exists. The window 83 (partial image signal Ip) is an image in the window of the partial image signal Ip including the isolated pattern and the surrounding normal circuit pattern. First, the window 83 (partial image signal Ip) is divided by the dividing means 84 into an isolated pattern 85 and a surrounding pattern 86. As a dividing method, a method called labeling is generally known. The maximum diameter p of the isolated pattern is obtained by obtaining an ellipse 87 having the same second moment from the isolated pattern 85, obtaining a measurement pattern 91, and measuring the length p of the major axis of the ellipse of the measurement pattern. If p is greater than the inspection reference value, it is a harmful defect on conduction, and if p is less than or equal to the inspection reference value, it is a non-hazardous defect on conduction.

[0046] From then isolated pattern to pattern spacing n2 measurements to normal pattern around the boundary coordinates of the isolated pattern 85 by 88 (xi, yi) radius and the inspection standard value of the pattern spacing n ₂ about the The drawing pattern 89 is obtained by making a round around the boundary while drawing a circle, and the AND operation of the drawing pattern 89 and the surrounding pattern 86 is performed by AND means 90 to obtain a measurement pattern 92. When the number of patterns ≠ 0 in the measurement pattern 92, the pattern interval n ₂
Is a harmful defect in conduction smaller than the inspection reference value. In the case of the pattern number = 0, the pattern spacing n ₂ is a non-toxic defects on conduction inspection standard value or more.

FIG. 22 shows an example of an algorithm for judging the conductive harmfulness of a pattern defect when the pattern shown in FIG. The window 93 (partial image signal Ip) is an image in the window of the partial image signal Ip having a lack. The window 94 (partial image signal R
p) is an in-window image of the partial image signal Rp of the reference circuit pattern image. First window 93 determine the area S ₁ of the pattern from (partial image signals Ip) defective. Then the window 94 (partial image signal Rp) determined the area _{S 2} of the non-defective patterns from ΣSi ₌ S 2 -S ₁
Is calculated. If the area ΣSi is larger than the inspection reference value, it is a harmful defect on conduction, and if it is less than the inspection reference value, it is a non-hazardous defect on conduction.

FIG. 23 shows an example of an algorithm for determining the harmfulness of conduction when the pinhole shown in FIG. 9 is present in a large circuit pattern. The window 95 (partial image signal Ip) is an image in the window of the partial image signal Ip having a pinhole. Window 95 (partial image signal I
For p), the pinhole extraction processing by the pinhole extraction means 96 is performed to obtain a pinhole image signal 97 obtained by extracting only the pinhole. Where 9 for each pinhole
The ellipse having the same second moment by 8 (measurement image 9
9), measure the length li of the major axis of the ellipse, and
Is calculated. If Σli is greater than the inspection reference value, it is a harmful defect on conduction, and if Σli is less than the inspection reference value, it is a non-hazardous defect on conduction.

An example of an algorithm for judging harmfulness in conduction when the protrusion is in a large circuit pattern shown in FIG.
The algorithm is the same as the algorithm in FIG. 20 when the linear circuit pattern has a protrusion.

[0050]

As described above, according to the present invention,
Circuit patterns such as printed circuit boards can be visually inspected at high speed by matching complex inspection criteria with visual inspection to determine harmful defects and non-harmful defects in circuit pattern continuity. There is an effect that the operation of determining whether or not the defect is a true defect in the conduction can be omitted. In particular, according to the present invention, it is possible to rationalize the work of inspecting defects in the conduction of the circuit pattern and improve the reliability of the defect inspection.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a schematic configuration of an embodiment of a circuit pattern defect inspection apparatus according to the present invention.

FIG. 2 is a block diagram showing a schematic configuration of an embodiment of a circuit pattern defect inspection apparatus according to the present invention.

FIG. 3 is a perspective view showing a schematic configuration of an example of a conventional circuit pattern defect inspection apparatus.

FIG. 4 is a diagram illustrating a partial image signal corresponding to a circuit pattern image signal, a reference circuit pattern image signal, and a defect pattern image signal.

FIG. 5 is a diagram showing partial image signals corresponding to a circuit pattern image signal, a reference circuit pattern image signal, and a defect pattern image signal.

FIG. 6 is a diagram showing a partial image signal corresponding to a circuit pattern image signal, a reference circuit pattern image signal, and a defect pattern image signal.

FIG. 7 is a diagram illustrating partial image signals corresponding to a circuit pattern image signal, a reference circuit pattern image signal, and a defect pattern image signal.

FIG. 8 is a plan view of a circuit pattern showing shapes of a harmful defect and a non-harmful defect in conduction with respect to the circuit pattern.

FIG. 9 is a plan view of a circuit pattern showing shapes of harmful defects and non-harmful defects in conduction with respect to the circuit pattern.

FIG. 10 is a diagram showing an image signal and a binary picture element image signal obtained from the imaging device.

FIG. 11 is a block diagram illustrating an embodiment of an interface circuit.

FIG. 12 is a block diagram illustrating an example of an algorithm for determining a harmful defect and a non-harmful defect in conduction according to the present invention.

FIG. 13 is a block diagram showing an example of an algorithm for determining a harmful defect and a non-harmful defect in conduction according to the present invention.

FIG. 14 is a block diagram illustrating an example of an algorithm for determining a harmful defect and a non-harmful defect in conduction according to the present invention.

FIG. 15 is a block diagram showing an example of an algorithm for determining a harmful defect and a non-harmful defect in conduction according to the present invention.

FIG. 16 is a block diagram illustrating an example of an algorithm for determining a harmful defect and a non-harmful defect in conduction according to the present invention.

FIG. 17 is a block diagram illustrating an example of an algorithm for determining a harmful defect and a non-harmful defect in conduction according to the present invention.

FIG. 18 is a block diagram illustrating an example of an algorithm for determining a harmful defect and a non-harmful defect in conduction according to the present invention.

FIG. 19 is a block diagram showing an example of an algorithm for determining a harmful defect and a non-harmful defect in conduction according to the present invention.

FIG. 20 is a block diagram illustrating an example of an algorithm for determining a harmful defect and a non-harmful defect in conduction according to the present invention.

FIG. 21 is a block diagram showing an example of an algorithm for determining a harmful defect and a non-harmful defect in conduction according to the present invention.

FIG. 22 is a block diagram showing an example of an algorithm for determining a harmful defect and a non-harmful defect in conduction according to the present invention.

FIG. 23 is a block diagram illustrating an example of an algorithm for determining a harmful defect and a non-harmful defect in conduction according to the present invention.

[Explanation of symbols]

I: Inspection system II: Partial image inspection system A
... Circuit pattern B ... Reference circuit pattern 1,1 '
... Imaging device 3 ... Defect determination device 4 ... Defect (candidate)
Representative point signal 7 ... Reference pattern generator 8 ... Circuit pattern image signal 9, 9 '... Reference circuit pattern image signal 10 ... Defect pattern image signal 11 ... Interface 12 ... Partial image memory 13
... Partial image processing devices Ip, Ip ', Ip ", Rp, Rp', Rp", Dp,
Dp ', Dp "... Partial image signal

Continuation of the front page (72) Inventor Shigeki Kitamura 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Inside Hitachi Image Information System Co., Ltd. (56) References JP-A-59-149570 (JP, A) JP-A-50-131469 (JP, A)

Claims (12)

(57) [Claims] 1. An image pickup device, wherein an image of a sample having a pattern formed on a surface thereof is obtained by relatively moving an image pickup device operated by a predetermined image pickup signal and a sample, and an image of the sample is obtained. While imaging, a partial image including a defect candidate is extracted from the image at a first processing speed in synchronization with the imaging signal and stored in a storage unit, and the stored partial image is slower than the first processing speed. Processing at a second processing speed to extract defect candidates, and the size or shape of the extracted defect candidates or the harmfulness of the extracted defect candidates based on the positional relationship between the extracted defect candidates and the pattern. A defect inspection method characterized by determining a defect. 2. The defect inspection method according to claim 1, wherein the determination of the harmfulness of the defect candidate is performed at a clock frequency slower than the extraction of the partial image including the defect candidate. 3. A portion including a defect candidate by capturing an image of a sample in synchronization with a predetermined imaging signal to obtain an image of the sample, and processing the image at a first processing speed in synchronization with the imaging signal. The images are sequentially extracted, the partial images including the extracted defect candidates are sequentially stored in a storage unit, and the partial images including the stored defect candidates are sequentially processed at a second processing speed lower than the first processing speed. A defect inspection method, wherein the defect candidate is classified. 4. The defect inspection method according to claim 3 , wherein said classifying said defect candidate is to classify said defect candidate by using information of the feature amount of said extracted defect candidate. 5. The method according to claim 4 , wherein the information on the feature amount is information on a size of the extracted defect candidate.
Described defect inspection method. 6. The defect inspection method according to claim 3, wherein the classification of the defect candidates is classified into harmful defects and non-harmful defects in conduction. 7. An image of a sample is taken by synchronizing with a signal of a predetermined clock frequency to obtain an image of the sample, and the image is processed in synchronization with the signal to sequentially extract partial images including defect candidates. Sequentially storing the partial images including the extracted defect candidates in a storage unit, and sequentially processing the partial images including the stored defect candidates in synchronization with a signal having a clock frequency lower than a predetermined clock frequency of the signal. A defect inspection method, wherein the extracted defect candidates are classified according to: 8. The defect inspection according to claim 7 , wherein the partial image including the defect candidate is sequentially extracted by processing the image in synchronization with the signal, by pipeline image processing. Method. 9. The defect inspection method according to claim 7, wherein said classifying said defect candidates is classified into harmful defects and non-harmful defects in conduction. 10. A table means on which a sample having a pattern formed on a surface is mounted and movable in a plane, and said sample mounted on said table means is operated by a predetermined imaging signal to image said sample. Imaging means for obtaining an image of a sample, and partial image extraction means for extracting a partial image including a defect candidate from the obtained image of the sample in synchronization with the predetermined imaging signal while imaging the sample with the imaging means, Storage means for storing a partial image including a defect candidate extracted by the partial image extraction means in synchronization with the predetermined imaging signal; and synchronizing the stored partial image with a signal having a lower frequency than the predetermined imaging signal Defect candidate extracting means for extracting a defect candidate by extracting the defect candidate based on the size or shape of the defect candidate extracted by the defect candidate extracting means or the positional relationship between the extracted defect candidate and the pattern. Defect inspection apparatus characterized by comprising a determining means for determining hazard candidates. 11. An image pickup means for picking up an image of a sample in synchronism with a predetermined image pickup signal, and an image of the sample obtained by picking up an image of the sample by said image pickup means is processed in synchronization with said image pickup signal, thereby providing a defect candidate. A partial image extracting unit for sequentially extracting partial images including: a storage unit for sequentially storing partial images including the defect candidates extracted by the partial image extracting unit in synchronization with the imaging signal; A defect classification device for sequentially processing the partial image including the defect candidate in synchronization with a signal having a frequency lower than the predetermined imaging signal and classifying the defect; 12. An imaging means for capturing an image of a sample in synchronization with a signal of a predetermined clock frequency to obtain an image of the sample, and synchronizing the image obtained by the imaging means with a signal of the predetermined clock frequency. Partial image extraction means for sequentially extracting partial images containing defect candidates by processing; storage means for sequentially storing partial images containing defect candidates extracted by said partial image extraction means; and said defect stored in said storage means. Defect inspection means for classifying the extracted defect candidates by sequentially processing the partial image including the candidate in synchronization with a signal having a clock frequency lower than a predetermined clock frequency of the signal, and classifying the extracted defect candidates. apparatus.